Lines Matching defs:ioaddr
50 /* define all ioaddr */
52 #define byPAR0 ioaddr
53 #define byRCR ioaddr + 6
54 #define byTCR ioaddr + 7
55 #define byCR0 ioaddr + 8
56 #define byCR1 ioaddr + 9
57 #define byISR0 ioaddr + 0x0c
58 #define byISR1 ioaddr + 0x0d
59 #define byIMR0 ioaddr + 0x0e
60 #define byIMR1 ioaddr + 0x0f
61 #define byMAR0 ioaddr + 0x10
62 #define byMAR1 ioaddr + 0x11
63 #define byMAR2 ioaddr + 0x12
64 #define byMAR3 ioaddr + 0x13
65 #define byMAR4 ioaddr + 0x14
66 #define byMAR5 ioaddr + 0x15
67 #define byMAR6 ioaddr + 0x16
68 #define byMAR7 ioaddr + 0x17
69 #define dwCurrentRxDescAddr ioaddr + 0x18
70 #define dwCurrentTxDescAddr ioaddr + 0x1c
71 #define dwCurrentRDSE0 ioaddr + 0x20
72 #define dwCurrentRDSE1 ioaddr + 0x24
73 #define dwCurrentRDSE2 ioaddr + 0x28
74 #define dwCurrentRDSE3 ioaddr + 0x2c
75 #define dwNextRDSE0 ioaddr + 0x30
76 #define dwNextRDSE1 ioaddr + 0x34
77 #define dwNextRDSE2 ioaddr + 0x38
78 #define dwNextRDSE3 ioaddr + 0x3c
79 #define dwCurrentTDSE0 ioaddr + 0x40
80 #define dwCurrentTDSE1 ioaddr + 0x44
81 #define dwCurrentTDSE2 ioaddr + 0x48
82 #define dwCurrentTDSE3 ioaddr + 0x4c
83 #define dwNextTDSE0 ioaddr + 0x50
84 #define dwNextTDSE1 ioaddr + 0x54
85 #define dwNextTDSE2 ioaddr + 0x58
86 #define dwNextTDSE3 ioaddr + 0x5c
87 #define dwCurrRxDMAPtr ioaddr + 0x60
88 #define dwCurrTxDMAPtr ioaddr + 0x64
89 #define byMPHY ioaddr + 0x6c
90 #define byMIISR ioaddr + 0x6d
91 #define byBCR0 ioaddr + 0x6e
92 #define byBCR1 ioaddr + 0x6f
93 #define byMIICR ioaddr + 0x70
94 #define byMIIAD ioaddr + 0x71
95 #define wMIIDATA ioaddr + 0x72
96 #define byEECSR ioaddr + 0x74
97 #define byTEST ioaddr + 0x75
98 #define byGPIO ioaddr + 0x76
99 #define byCFGA ioaddr + 0x78
100 #define byCFGB ioaddr + 0x79
101 #define byCFGC ioaddr + 0x7a
102 #define byCFGD ioaddr + 0x7b
103 #define wTallyCntMPA ioaddr + 0x7c
104 #define wTallyCntCRC ioaddr + 0x7d
105 #define bySTICKHW ioaddr + 0x83
106 #define byWOLcrClr ioaddr + 0xA4
107 #define byWOLcgClr ioaddr + 0xA7
108 #define byPwrcsrClr ioaddr + 0xAC
640 unsigned short ioaddr;
656 static void rhine_probe1 (struct nic *nic, int ioaddr,
713 QueryAuto (int ioaddr)
722 MIIReturn = ReadMII (byMIIIndex, ioaddr);
726 MIIReturn = ReadMII (byMIIIndex, ioaddr);
739 ReadMII (int byMIIIndex, int ioaddr)
777 WriteMII (char byMIISetByte, char byMIISetBit, char byMIIOP, int ioaddr)
895 intr_status = inw(nic->ioaddr + IntrStatus);
898 intr_status |= inb(nic->ioaddr + IntrStatus2) << 16;
902 outw(intr_status, nic->ioaddr + IntrEnable);
905 outw(0x0010, nic->ioaddr + 0x84);
915 if (!pci->ioaddr)
917 rhine_probe1 (nic, pci->ioaddr, pci->dev_id, -1);
927 nic->ioaddr = tp->ioaddr;
936 int ioaddr = tp->ioaddr;
947 rhine_probe1 (struct nic *nic, int ioaddr, int chip_id, int options)
984 printf ("IO address %hX Ethernet Address: %!\n", ioaddr, nic->node_addr);
987 WriteMII (0, 9, 1, ioaddr);
995 if (ReadMII (1, ioaddr) & 0x0020)
1002 printf("MII : Address %hhX ",inb(ioaddr+0x6c));
1006 st1=ReadMII(1,ioaddr)>>8;
1007 st2=ReadMII(1,ioaddr)&0xFF;
1008 adv1=ReadMII(4,ioaddr)>>8;
1009 adv2=ReadMII(4,ioaddr)&0xFF;
1010 l1=ReadMII(5,ioaddr)>>8;
1011 l2=ReadMII(5,ioaddr)&0xFF;
1018 byMIIvalue = inb (ioaddr + 0x6d);
1029 FDXFlag = QueryAuto (ioaddr);
1042 WriteMII (17, 1, 1, ioaddr);
1057 tp->ioaddr = ioaddr;
1076 int ioaddr = tp->ioaddr;
1095 int ioaddr = tp->ioaddr;
1110 /*outb(CmdReset, ioaddr + ChipCmd); */
1175 FDXFlag = QueryAuto (ioaddr);
1191 #define IOSYNC do { readb(nic->ioaddr + StationAddr); } while (0)
1206 intr_status = inw(nic->ioaddr + IntrStatus);
1210 intr_status |= inb(nic->ioaddr + IntrStatus2) << 16;
1214 outb(0x08, nic->ioaddr + IntrStatus2);
1215 outw(intr_status & 0xffff, nic->ioaddr + IntrStatus);
1241 outw(DEFAULT_INTR & ~IntrRxDone, nic->ioaddr + IntrStatus);
1253 int ioaddr = tp->ioaddr;