Lines Matching defs:ioaddr

64 static u32 ioaddr;		/* Globally used for the card's io address */
444 lp->a.reset(ioaddr);
447 lp->a.write_bcr(ioaddr, 20, 2);
450 val = lp->a.read_bcr(ioaddr, 2) & ~2;
453 lp->a.write_bcr(ioaddr, 2, val);
456 val = lp->a.read_bcr(ioaddr, 9) & ~3;
465 read_csr(ioaddr,
466 88) | (lp->a.read_csr(ioaddr,
472 lp->a.write_bcr(ioaddr, 9, val);
476 val = lp->a.read_csr(ioaddr, 124) & ~0x10;
479 lp->a.write_csr(ioaddr, 124, val);
482 val = lp->a.read_bcr(ioaddr, 32) & ~0x38; /* disable Auto Negotiation, set 10Mpbs, HD */
487 lp->a.write_bcr(ioaddr, 32, val);
490 val = lp->a.read_bcr(ioaddr, 32) & ~0x98;
492 lp->a.write_bcr(ioaddr, 32, val);
498 val = lp->a.read_csr(ioaddr, 3);
500 lp->a.write_csr(ioaddr, 3, val);
505 val = lp->a.read_csr(ioaddr, 5);
507 lp->a.write_csr(ioaddr, 5, val);
518 lp->a.write_csr(ioaddr, 1,
520 lp->a.write_csr(ioaddr, 2, (virt_to_bus(&lp->init_block)) >> 16);
521 lp->a.write_csr(ioaddr, 4, 0x0915);
522 lp->a.write_csr(ioaddr, 0, 0x0001);
527 if (lp->a.read_csr(ioaddr, 0) & 0x0100)
533 lp->a.write_csr(ioaddr, 0, 0x0042);
535 dprintf(("pcnet32 open, csr0 %hX.\n", lp->a.read_csr(ioaddr, 0)));
617 lp->a.write_csr(ioaddr, 0, 0x0048);
640 lp->a.write_csr(ioaddr, 0, 0x0004);
646 lp->a.write_bcr(ioaddr, 20, 4);
679 if (pci->ioaddr == 0)
683 ioaddr = pci->ioaddr;
688 nic->ioaddr = pci->ioaddr & ~3;
691 pcnet32_wio_reset(ioaddr);
694 if (pcnet32_wio_read_csr(ioaddr, 0) == 4
695 && pcnet32_wio_check(ioaddr)) {
698 pcnet32_dwio_reset(ioaddr);
699 if (pcnet32_dwio_read_csr(ioaddr, 0) == 4
700 && pcnet32_dwio_check(ioaddr)) {
707 a->read_csr(ioaddr, 88) | (a->read_csr(ioaddr, 89) << 16);
760 media = a->read_bcr(ioaddr, 49);
763 a->write_bcr(ioaddr, 49, media);
784 a->write_bcr(ioaddr, 18,
785 (a->read_bcr(ioaddr, 18) | 0x0800));
786 a->write_csr(ioaddr, 80,
787 (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00);
792 dprintf(("%s at %hX,", chipname, ioaddr));
796 promaddr[i] = inb(ioaddr + i);
803 printf("%s: %! at ioaddr %hX, ", pci->name, nic->node_addr,
804 ioaddr);
814 i = a->read_csr(ioaddr, 80) & 0x0C00; /* Check tx_start_pt */
830 i = a->read_bcr(ioaddr, 18); /* Check Burst/Bus control */
840 i = a->read_bcr(ioaddr, 25);
842 i = a->read_bcr(ioaddr, 26);
844 i = a->read_bcr(ioaddr, 27);
888 a->write_bcr(ioaddr, 20, 2);
891 a->write_csr(ioaddr, 1, (virt_to_bus(&lp->init_block)) & 0xffff);
892 a->write_csr(ioaddr, 2, (virt_to_bus(&lp->init_block)) >> 16);
901 a->write_csr(ioaddr, 0, 0x41);
963 phyaddr = lp->a.read_bcr(ioaddr, 33);
965 lp->a.write_bcr(ioaddr, 33,
967 val_out = lp->a.read_bcr(ioaddr, 34);
968 lp->a.write_bcr(ioaddr, 33, phyaddr);
982 phyaddr = lp->a.read_bcr(ioaddr, 33);
984 lp->a.write_bcr(ioaddr, 33,
986 lp->a.write_bcr(ioaddr, 34, val);
987 lp->a.write_bcr(ioaddr, 33, phyaddr);