Lines Matching refs:result
33 // cpuid result register layouts. These are all unions of a uint32_t
366 uint32_t result = _cpuid_info.std_cpuid1_eax.bits.family;
367 result += _cpuid_info.std_cpuid1_eax.bits.ext_family;
368 return result;
372 uint32_t result = _cpuid_info.std_cpuid1_eax.bits.model;
373 result |= _cpuid_info.std_cpuid1_eax.bits.ext_model << 4;
374 return result;
378 uint32_t result = _cpuid_info.std_cpuid1_eax.bits.stepping;
379 return result;
383 uint result = threads_per_core();
384 return result;
388 uint32_t result = 0;
390 result |= CPU_CX8;
392 result |= CPU_CMOV;
395 result |= CPU_FXSR;
398 result |= CPU_HT;
401 result |= CPU_MMX;
403 result |= CPU_SSE;
405 result |= CPU_SSE2;
407 result |= CPU_SSE3;
409 result |= CPU_SSSE3;
411 result |= CPU_SSE4_1;
413 result |= CPU_SSE4_2;
415 result |= CPU_POPCNT;
420 result |= CPU_AVX;
422 result |= CPU_AVX2;
425 result |= CPU_TSC;
427 result |= CPU_TSCINV;
429 result |= CPU_AES;
431 result |= CPU_ERMS;
437 result |= CPU_3DNOW_PREFETCH;
439 result |= CPU_LZCNT;
441 result |= CPU_SSE4A;
444 return result;
500 uint result = 1;
503 result = _cpuid_info.tpl_cpuidB1_ebx.bits.logical_cpus /
506 result = (_cpuid_info.dcp_cpuid4_eax.bits.cores_per_cpu + 1);
509 result = (_cpuid_info.ext_cpuid8_ecx.bits.cores_per_cpu + 1);
511 return result;
515 uint result = 1;
517 result = _cpuid_info.tpl_cpuidB0_ebx.bits.logical_cpus;
519 result = _cpuid_info.std_cpuid1_ebx.bits.threads_per_cpu /
522 return result;
526 intx result = 0;
528 result = (_cpuid_info.dcp_cpuid4_ebx.bits.L1_line_size + 1);
530 result = _cpuid_info.ext_cpuid5_ecx.bits.L1_line_size;
532 if (result < 32) // not defined ?
533 result = 32; // 32 bytes by default on x86 and other x64
534 return result;