Lines Matching refs:move

56     __ move(res, reg);
118 // there is no immediate move of word values in asembler_i486.?pp
211 __ move(LIR_OprFact::intptrConst(counter), pointer);
239 __ move(left, tmp);
244 __ move(left, tmp);
332 __ move(value.result(), array_addr, null_check_info);
336 __ move(value.result(), array_addr, null_check_info);
425 // frem and drem destroy also right operand, so move it to a new register
449 __ move(right.result(), fpu1); // order of left and right operand is important!
450 __ move(left.result(), fpu0);
452 __ move(fpu0, reg);
484 __ move(right.result(), cc->at(0));
506 __ move(result_reg, result);
522 __ move(reg, result);
585 __ move(result_reg, result);
640 // likely that no move for 2-operand-LIR-form is necessary
681 // likely that no move for 2-operand-LIR-form is necessary
764 __ move(offset.result(), tmp);
800 // generate conditional move of boolean result
854 __ move(calc_input2, tmp);
858 __ move(calc_input, tmp);
881 __ move(calc_result, x->operand());
986 __ move(input, conv_input);
1004 __ move(conv_result, result);
1028 __ move(reg, result);
1053 __ move(reg, result);
1087 __ move(reg, result);
1125 __ move(LIR_OprFact::intConst(x->rank()), rank);
1127 __ move(FrameMap::rsp_opr, varargs);
1137 __ move(reg, result);
1288 __ move(value, spill);
1312 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1328 __ move(tmp, spill);
1329 __ move(spill, dst);
1344 __ move(data, spill);
1345 __ move(spill, tmp);
1346 __ move(tmp, addr);
1354 __ move(data, addr);
1359 __ move(data, addr);
1388 __ move(offset, tmp);
1399 __ move(data, dst);