Lines Matching defs:rreg
2055 Register rreg = right->as_register();
2057 case lir_add: __ addl (lreg, rreg); break;
2058 case lir_sub: __ subl (lreg, rreg); break;
2059 case lir_mul: __ imull(lreg, rreg); break;
2168 XMMRegister rreg = right->as_xmm_float_reg();
2170 case lir_add: __ addss(lreg, rreg); break;
2171 case lir_sub: __ subss(lreg, rreg); break;
2173 case lir_mul: __ mulss(lreg, rreg); break;
2175 case lir_div: __ divss(lreg, rreg); break;
2204 XMMRegister rreg = right->as_xmm_double_reg();
2206 case lir_add: __ addsd(lreg, rreg); break;
2207 case lir_sub: __ subsd(lreg, rreg); break;
2209 case lir_mul: __ mulsd(lreg, rreg); break;
2211 case lir_div: __ divsd(lreg, rreg); break;
2324 Register rreg = right->as_register();
2326 case lir_add: __ addl(laddr, rreg); break;
2327 case lir_sub: __ subl(laddr, rreg); break;
2621 Register rreg = right->as_register();
2623 assert(rreg != rdx, "right register must not be rdx");
2628 int idivl_offset = __ corrected_idivl(rreg);