16  * 2 along with this work; if not, write to the Free Software Foundation,
47     n_register_parameters = 0   // 0 registers used to pass arguments
91 // What pleases us is to offset the java calling convention so that when
93 // have to do little shuffling. A suitable jni method is non-static and a
145 // Address is an abstraction used to represent a memory location
204   // converted to 0(Register) which is quite a different animal.
256   // argument since ByteSize is mapped to an int type in that case.
260   // are mapped to the same type and thus the compiler cannot make a
300   // Address.  An index of 4 (rsp) corresponds to having no index, so convert
301   // that to noreg for the Address constructor.
324 // need to be treated specially on 32bit vs. 64bit platforms. By splitting it out
325 // the few instructions that need to deal with address literals are unique and the
326 // MacroAssembler does not have to implement every instruction in the Assembler
327 // in order to search for address literals that may need special handling depending
328 // on the instruction and the platform. As small step on the way to merging i486/amd64
334   // Typically we use AddressLiterals we want to use their rval
339   // If the target is far we'll need to load the ea of this to
340   // a register to reach it. Otherwise if near we can do rip
427 // magic on amd64 to get the final result
534     // input to locate_operand, and format code for relocations
552   // of the resulting jvm. This is done mostly to keep the footprint of minimal
553   // to the size it was prior to merging up the 32bit and 64bit assemblers.
637     // It is OK to cast from Register to XMMRegister to pass argument here
708   // Immediate-to-memory forms
752   // relative in these instructions will always be able to reach the potentially
781   // New cpus require use of movsd and movss to avoid partial register stall
796   // New cpus require use of movaps and movapd to avoid partial register stall
821   // belong in macro assembler but there is no need for both varieties to exist
839   // These are dummies to prevent surprise implicit conversions to Register
956   // these are dummies used to catch attempting to convert NULL to Register
982   // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
986   // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
992   // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value
998   // Convert Packed Signed Doubleword Integers to Packed Double-Precision Floating-Point Value
1001   // Convert Packed Signed Doubleword Integers to Packed Single-Precision Floating-Point Value
1004   // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
1008   // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
1013   // Convert with Truncation Scalar Single-Precision Floating-Point Value to Doubleword Integer
1183   // jcc is the generic conditional branch generator to run-
1184   // time routines, jcc is used for branches to labels. jcc
1187   // to the label fixup chain. Usage:
1190   // jcc(cc, L);   // forward branch to unbound label
1191   // bind(L);      // bind label to the current pc
1192   // jcc(cc, L);   // backward branch to bound label
1200   // Conditional jump to a 8-bit offset to L.
1209   void jmp(Label& L, bool maybe_short = true);   // unconditional jump to L
1213   // Unconditional 8-bit offset jump to L.
1249       // We only have to handle StoreLoad
1256         // Any change to this code may need to revisit other places in
1297   // Move lower 64bit to high 64bit in 128bit register
1340   // Move signed 32bit immediate to 64bit extending sign
1346   void movslq(Register dst, void* src); // Dummy declaration to cause NULL to be ambiguous
1610   void set_byte_if_not_zero(Register dst); // sets reg to 1 if not zero, otherwise 0
1784   // AVX instruction which is used to clear upper 128 bits of YMM registers and
1785   // to avoid transaction penalty between AVX and SSE states. There is no
1819   // may customize this version by overriding it for its purposes (e.g., to save/restore
1822   // c++ interpreter never wants to use interp_masm version of call_VM
1830     int     number_of_arguments        // the number of arguments to pop after the call
1834   // may customize this version by overriding it for its purposes (e.g., to save/restore
1839   // specified, the return value will correspond to that register. If no last_java_sp is specified
1844     Register last_java_sp,             // to set up last_Java_frame in stubs; use noreg otherwise
1846     int      number_of_arguments,      // the number of arguments (w/o thread) to pop after the call
1847     bool     check_exceptions          // whether to check for pending exceptions after return
1953   // Support for getting the JavaThread pointer (i.e.; a reference to thread-local information)
1962   // to ENTRY/ENTRY_X entry points while call_VM_leaf's correspond to LEAF entry points.
2003   // These always tightly bind to MacroAssembler::call_VM_base
2020   // These always tightly bind to MacroAssembler::call_VM_leaf_base
2065   // split store_check(Register obj) to enhance instruction interleaving
2069   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
2097   // This dummy is to prevent a call to store_heap_oop from
2163   // CF (corresponds to C0) if x < y
2164   // PF (corresponds to C2) if unordered
2165   // ZF (corresponds to C3) if x = y
2170   // Variant of the above which allows y to be further down the stack
2180   // Variant of the above which allows y to be further down the stack
2203   // branch to L if FPU flag C2 is set/not set
2228   // Round up to a power of two
2237     Register obj,                      // result: pointer to object after successful allocation
2244     Register obj,                      // result: pointer to object after successful allocation
2283   // The rest of the type check; must be wired to a corresponding fast path.
2307   void set_word_if_not_zero(Register reg); // sets reg to 1 if not zero, otherwise 0
2352   // Writes to stack successive pages until offset reached to check for
2369   // be killed; if not supplied, push/pop will be used internally to
2371   // Optional slow case is for implementations (interpreter and C1) which branch to
2388   // operands. In general the names are modified to avoid hiding the instruction in Assembler
2389   // so that we don't need to implement all the varieties in the Assembler with trivial wrappers
2390   // here in MacroAssembler. The major exception to this rule is call
2411   // renamed to drag out the casting of address to int32_t/intptr_t
2437   // cmp64 to avoild hiding cmpq
2515   // NOTE: this call tranfers to the effective address of entry NOT
2522   // NOTE: these jumps tranfer to the effective address of dst NOT
2529   // to be installed in the Address class. This jump will tranfers to the address
2573   // all corner cases and may result in NaN and require fallback to a
2580   // computes exp(x). Fallback to runtime call included.
2582   // computes pow(x,y). Fallback to runtime call included.
2593   // computes pow(x,y) or exp(x). Fallback to runtime call included.
2750   // Move packed integer values from low 128 bit to hign 128 bit in 256 bit vector.
2802   // to avoid hiding movl
2806   // to avoid hiding movb
2824   // sign extend as need a l to ptr sized element
2842   // which don't need to be loaded through stack.
2848     // Smallest code: we don't need to load through stack,
2863                      Register to, Register value, Register count,
2876  * the flag passed to the constructor, which will be checked at run-time.

Indexes created Tue Jul 24 14:28:13 CEST 2018