Cross Reference: /openjdk7/hotspot/src/cpu/x86/vm/assembler

Lines Matching refs:nds
2894 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, Address src) {
2896   emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false);
2899 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src) {
2901   emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false);
2904 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, Address src) {
2906   emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false);
2909 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src) {
2911   emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false);
2914 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, Address src) {
2916   emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false);
2919 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src) {
2921   emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false);
2924 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, Address src) {
2926   emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false);
2929 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src) {
2931   emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false);
2934 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, Address src) {
2936   emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false);
2939 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src) {
2941   emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false);
2944 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, Address src) {
2946   emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false);
2949 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src) {
2951   emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false);
2954 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, Address src) {
2956   emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false);
2959 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src) {
2961   emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false);
2964 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, Address src) {
2966   emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false);
2969 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src) {
2971   emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false);
2988 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
2990   emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256);
2993 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
2995   emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256);
2998 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3000   emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256);
3003 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3005   emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256);
3018 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3020   emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256);
3023 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3025   emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256);
3028 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3030   emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256);
3033 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3035   emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256);
3048 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3050   emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256);
3053 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3055   emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256);
3058 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3060   emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256);
3063 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3065   emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256);
3078 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3080   emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256);
3083 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3085   emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256);
3088 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3090   emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256);
3093 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3095   emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256);
3118 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3120   emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256);
3123 void Assembler::vandps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3125   emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256);
3128 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3130   emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256);
3133 void Assembler::vandps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3135   emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256);
3158 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3160   emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256);
3163 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3165   emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256);
3168 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3170   emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256);
3173 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3175   emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256);
3200 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3202   emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256);
3205 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3207   emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256);
3210 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3212   emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256);
3215 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3217   emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256);
3220 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3222   emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256);
3225 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3227   emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256);
3230 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3232   emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256);
3235 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3237   emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256);
3260 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3262   emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256);
3265 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3267   emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256);
3270 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3272   emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256);
3275 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3277   emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256);
3280 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3282   emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256);
3285 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3287   emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256);
3290 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3292   emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256);
3295 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3297   emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256);
3312 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3314   emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256);
3317 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3319   int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38);
3324 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3326   emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256);
3329 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3333   int nds_enc = nds->is_valid() ? nds->encoding() : 0;
3559 void Assembler::vpand(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3561   emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256);
3564 void Assembler::vpand(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3566   emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256);
3574 void Assembler::vpor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3576   emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256);
3579 void Assembler::vpor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3581   emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256);
3589 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) {
3591   emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256);
3594 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) {
3596   emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256);
3600 void Assembler::vinsertf128h(XMMRegister dst, XMMRegister nds, XMMRegister src) {
3603   int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A);
3638 void Assembler::vinserti128h(XMMRegister dst, XMMRegister nds, XMMRegister src) {
3641   int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A);
4244 void Assembler::simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) {
4247     int  nds_enc = nds->is_valid() ? nds->encoding() : 0;
4250     assert((nds == xreg) || (nds == xnoreg), "wrong sse encoding");
4255 int Assembler::simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) {
4259     int nds_enc = nds->is_valid() ? nds->encoding() : 0;
4262     assert((nds == dst) || (nds == src) || (nds == xnoreg), "wrong sse encoding");
4295 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds,
4298   vex_prefix(dst, nds, src, pre, vector256);
4303 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds,
4305   int encode = vex_prefix_and_encode(dst, nds, src, pre, vector256);
8476 void MacroAssembler::vaddsd(XMMRegister dst, XMMRegister nds, AddressLiteral src) {
8478     vaddsd(dst, nds, as_Address(src));
8481     vaddsd(dst, nds, Address(rscratch1, 0));
8485 void MacroAssembler::vaddss(XMMRegister dst, XMMRegister nds, AddressLiteral src) {
8487     vaddss(dst, nds, as_Address(src));
8490     vaddss(dst, nds, Address(rscratch1, 0));
8494 void MacroAssembler::vandpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, bool vector256) {
8496     vandpd(dst, nds, as_Address(src), vector256);
8499     vandpd(dst, nds, Address(rscratch1, 0), vector256);
8503 void MacroAssembler::vandps(XMMRegister dst, XMMRegister nds, AddressLiteral src, bool vector256) {
8505     vandps(dst, nds, as_Address(src), vector256);
8508     vandps(dst, nds, Address(rscratch1, 0), vector256);
8512 void MacroAssembler::vdivsd(XMMRegister dst, XMMRegister nds, AddressLiteral src) {
8514     vdivsd(dst, nds, as_Address(src));
8517     vdivsd(dst, nds, Address(rscratch1, 0));
8521 void MacroAssembler::vdivss(XMMRegister dst, XMMRegister nds, AddressLiteral src) {
8523     vdivss(dst, nds, as_Address(src));
8526     vdivss(dst, nds, Address(rscratch1, 0));
8530 void MacroAssembler::vmulsd(XMMRegister dst, XMMRegister nds, AddressLiteral src) {
8532     vmulsd(dst, nds, as_Address(src));
8535     vmulsd(dst, nds, Address(rscratch1, 0));
8539 void MacroAssembler::vmulss(XMMRegister dst, XMMRegister nds, AddressLiteral src) {
8541     vmulss(dst, nds, as_Address(src));
8544     vmulss(dst, nds, Address(rscratch1, 0));
8548 void MacroAssembler::vsubsd(XMMRegister dst, XMMRegister nds, AddressLiteral src) {
8550     vsubsd(dst, nds, as_Address(src));
8553     vsubsd(dst, nds, Address(rscratch1, 0));
8557 void MacroAssembler::vsubss(XMMRegister dst, XMMRegister nds, AddressLiteral src) {
8559     vsubss(dst, nds, as_Address(src));
8562     vsubss(dst, nds, Address(rscratch1, 0));
8566 void MacroAssembler::vxorpd(XMMRegister dst, XMMRegister nds, AddressLiteral src, bool vector256) {
8568     vxorpd(dst, nds, as_Address(src), vector256);
8571     vxorpd(dst, nds, Address(rscratch1, 0), vector256);
8575 void MacroAssembler::vxorps(XMMRegister dst, XMMRegister nds, AddressLiteral src, bool vector256) {
8577     vxorps(dst, nds, as_Address(src), vector256);
8580     vxorps(dst, nds, Address(rscratch1, 0), vector256);