Cross Reference: /openjdk7/hotspot/src/cpu/x86/vm/assembler

Lines Matching defs:base
133   AddressLiteral base = adr.base();
136   Address array(index._base, index._index, index._scale, (intptr_t) base.target());
137   array._rspec = base._rspec;
157 Address Address::make_raw(int base, int index, int scale, int disp, bool disp_is_oop) {
164     Address madr(as_Register(base), as_Register(index), (Address::ScaleFactor)scale, in_ByteSize(disp));
168     Address madr(as_Register(base), noreg, Address::no_scale, in_ByteSize(disp));
292 void Assembler::emit_operand(Register reg, Register base, Register index,
302   int baseenc = base->is_valid() ? encode(base) : 0;
304   if (base->is_valid()) {
307       // [base + index*scale + disp]
309           base != rbp LP64_ONLY(&& base != r13)) {
310         // [base + index*scale]
311         // [00 reg 100][ss index base]
316         // [base + index*scale + imm8]
317         // [01 reg 100][ss index base] imm8
323         // [base + index*scale + disp32]
324         // [10 reg 100][ss index base] disp32
330     } else if (base == rsp LP64_ONLY(|| base == r12)) {
351       // [base + disp]
352       assert(base != rsp LP64_ONLY(&& base != r12), "illegal addressing mode");
354           base != rbp LP64_ONLY(&& base != r13)) {
355         // [base]
356         // [00 reg base]
359         // [base + disp8]
360         // [01 reg base] disp8
364         // [base + disp32]
365         // [10 reg base] disp32
410 void Assembler::emit_operand(XMMRegister reg, Register base, Register index,
413   emit_operand((Register)reg, base, index, scale, disp, rspec);
772   int base = op2 & 0x07;
776   if (base == b100 && (op2 >> 6) != 3) {
778     base = op3 & 0x07;   // refetch the base
784     // [00 reg  100][ss index base]
786     // [00 reg base]
790     if (base == b101) {
798     // [01 reg  100][ss index base][disp8]
800     // [01 reg base]               [disp8]
805     // [10 reg  100][ss index base][disp32]
807     // [10 reg base]               [disp32]
814     // [11 reg base]  (not a memory addressing mode)
5778 // 32bit can do a case table jump in one instruction but we no longer allow the base
6124   AddressLiteral base = adr.base();
6125   lea(rscratch1, base);
6405 // 32bit can do a case table jump in one instruction but we no longer allow the base
6408   lea(rscratch1, entry.base());
9398   const int base = instanceKlass::vtable_start_offset() * wordSize;
9402                             base + vtableEntry::method_offset_in_bytes());
9743   // Address adjust(addr.base(), addr.index(), addr.scale(), addr.disp() + BytesPerWord);
10318   verify_heapbase("MacroAssembler::encode_heap_oop: heap base corrupted?");
10336   verify_heapbase("MacroAssembler::encode_heap_oop_not_null: heap base corrupted?");
10357   verify_heapbase("MacroAssembler::encode_heap_oop_not_null2: heap base corrupted?");
10381   verify_heapbase("MacroAssembler::decode_heap_oop: heap base corrupted?");
10560 void MacroAssembler::clear_mem(Register base, Register cnt, Register tmp) {
10562   // base - start address, qword aligned.
10563   assert(base==rdi, "base register must be edi for rep stos");