Lines Matching refs:O4

679         const Register& yield_reg = O4;
710 // Overwrites (v8): O3,O4,O5
731 // compare_value: O4:O3
752 __ srl(O4, 0, O4);
753 __ or3(O3,O4,O3); // O3 holds 64-bit value from exchange_value
775 // Overwrites (v8): O3,O4,O5
795 const Register& value_reg = O4;
988 // Kills temps: O3, O4
1002 const Register byte_count = O4; // count << log2_elem_size
1147 __ set(block_copy_count, O4);
1148 __ cmp_and_br_short(count, O4, Assembler::lessUnsigned, Assembler::pt, L_skip_block_copy);
1152 __ sub(from, to, O4);
1153 __ srax(O4, 4, O4); // divide by 16 since following short branch have only 5 bits for imm.
1154 __ cmp_and_br_short(O4, (tail_size>>4), Assembler::lessEqualUnsigned, Assembler::pn, L_skip_block_copy);
1164 __ set(prefetch_count, O4);
1165 __ cmp_and_brx_short(count, O4, Assembler::less, Assembler::pt, L_block_copy);
1188 __ set(prefetch_count, O4);
1189 __ cmp_and_brx_short(count, O4, Assembler::lessUnsigned, Assembler::pt, L_copy);
1222 __ ldx(from, 0, O4);
1227 __ srlx(O4, right_shift, G3);
1229 __ sllx(O4, left_shift, O4);
1231 __ bset(G3, O4);
1234 __ stxa(O4, to, -8);
1237 __ stx(O4, to, -8);
1287 __ ldx(from, 0, O4);
1290 __ srlx(O4, right_shift, G3);
1337 __ ldx(end_from, -8, O4);
1343 __ sllx(O4, left_shift, G3);
1346 __ srlx(O4, right_shift, O4);
1348 __ bset(G3, O4);
1349 __ stx(O4, end_to, 0);
1358 __ ldx(end_from, -8, O4);
1362 __ sllx(O4, left_shift, G3);
1393 // O3, O4, G3, G4 are used as temp registers
1474 // O3, O4 are used as temp registers
1475 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr, O3, O4);
1565 __ ldx(end_from, 0, O4);
1570 __ delayed()->stx(O4, end_to, 0);
1580 __ ldub(end_from, 0, O4);
1583 __ delayed()->stb(O4, end_to, 0);
1586 // O3, O4 are used as temp registers
1587 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr, O3, O4);
1614 // O3, O4, G3, G4 are used as temp registers
1664 __ lduh(from, 2, O4);
1668 __ sth(O4, to, -2);
1702 // O3, O4 are used as temp registers
1703 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr, O3, O4);
1997 __ lduh(end_from, -4, O4);
2001 __ sth(O4, end_to, 0);
2027 __ ldx(end_from, 0, O4);
2032 __ delayed()->stx(O4, end_to, 0);
2041 __ lduh(end_from, 0, O4);
2044 __ delayed()->sth(O4, end_to, 0);
2047 // O3, O4 are used as temp registers
2048 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr, O3, O4);
2070 __ ldx(from, 4, O4);
2076 __ srlx(O4, 32, G3);
2078 __ sllx(O4, 32, O4);
2080 __ bset(G3, O4);
2083 __ stxa(O4, to, -8);
2086 __ stx(O4, to, -8);
2112 // O3, O4, G3, G4 are used as temp registers
2210 // O3, O4 are used as temp registers
2211 inc_counter_np(SharedRuntime::_jint_array_copy_ctr, O3, O4);
2238 // O3, O4, O5, G3 are used as temp registers
2256 __ ld(end_from, 0, O4);
2257 __ st(O4, end_to, 0);
2273 __ ldx(end_from, -12, O4);
2279 __ sllx(O4, 32, G3);
2282 __ srlx(O4, 32, O4);
2284 __ bset(O4, G3);
2297 __ ldx(end_from, 0, O4);
2302 __ delayed()->stx(O4, end_to, 0);
2311 __ ld(end_from, 0, O4);
2314 __ delayed()->st(O4, end_to, 0);
2345 // O3, O4 are used as temp registers
2346 inc_counter_np(SharedRuntime::_jint_array_copy_ctr, O3, O4);
2368 __ ldx(from, off+0, O4);
2371 __ stxa(O4, to, off+0);
2374 __ stx(O4, to, off+0);
2420 const Register offset0 = O4; // element offset
2435 // Now we can use O4(offset0), O5(offset8) as temps
2442 // Restore O4(offset0), O5(offset8)
2495 // O3, O4 are used as temp registers
2496 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr, O3, O4);
2518 const Register offset8 = O4; // element offset
2572 // O3, O4 are used as temp registers
2573 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr, O3, O4);
2623 // O3, O4 are used as temp registers
2624 inc_counter_np(SharedRuntime::_oop_array_copy_ctr, O3, O4);
2678 // O3, O4 are used as temp registers
2679 inc_counter_np(SharedRuntime::_oop_array_copy_ctr, O3, O4);
2729 // ckval: O4 (super_klass)
2738 const Register O4_ckval = O4; // super_klass
2764 __ mov(O4, G4); // spill: overlap test smashes O4
2769 __ mov(G4, O4);
2786 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr, O3, O4);
2830 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr, O3, O4);
2905 Register length, // length of copy (O4)
2944 // O4 - element count
2964 const Register length = O4; // elements count
3205 __ ld_ptr(G4_dst_klass, ek_offset, O4); // dest elem klass
3206 // lduw(O4, sco_offset, O3); // sco of elem klass
3209 __ delayed()->lduw(O4, sco_offset, O3);