Lines Matching refs:as_VMReg

152   map->set_callee_saved(VMRegImpl::stack2reg((o0_offset + 4)>>2), O0->as_VMReg());
156 map->set_callee_saved(VMRegImpl::stack2reg((o1_offset + 4)>>2), O1->as_VMReg());
159 map->set_callee_saved(VMRegImpl::stack2reg((o2_offset + 4)>>2), O2->as_VMReg());
162 map->set_callee_saved(VMRegImpl::stack2reg((o3_offset + 4)>>2), O3->as_VMReg());
165 map->set_callee_saved(VMRegImpl::stack2reg((o4_offset + 4)>>2), O4->as_VMReg());
168 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset + 4)>>2), O5->as_VMReg());
179 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset + debug_offset)>>2), G1->as_VMReg());
182 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset + debug_offset)>>2), G3->as_VMReg());
185 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset + debug_offset)>>2), G4->as_VMReg());
188 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset + debug_offset)>>2), G5->as_VMReg());
193 map->set_callee_saved(VMRegImpl::stack2reg((o0_offset)>>2), O0->as_VMReg()->next());
194 map->set_callee_saved(VMRegImpl::stack2reg((o1_offset)>>2), O1->as_VMReg()->next());
195 map->set_callee_saved(VMRegImpl::stack2reg((o2_offset)>>2), O2->as_VMReg()->next());
196 map->set_callee_saved(VMRegImpl::stack2reg((o3_offset)>>2), O3->as_VMReg()->next());
197 map->set_callee_saved(VMRegImpl::stack2reg((o4_offset)>>2), O4->as_VMReg()->next());
198 map->set_callee_saved(VMRegImpl::stack2reg((o5_offset)>>2), O5->as_VMReg()->next());
199 map->set_callee_saved(VMRegImpl::stack2reg((g1_offset)>>2), G1->as_VMReg()->next());
200 map->set_callee_saved(VMRegImpl::stack2reg((g3_offset)>>2), G3->as_VMReg()->next());
201 map->set_callee_saved(VMRegImpl::stack2reg((g4_offset)>>2), G4->as_VMReg()->next());
202 map->set_callee_saved(VMRegImpl::stack2reg((g5_offset)>>2), G5->as_VMReg()->next());
218 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2), f->as_VMReg());
219 map->set_callee_saved(VMRegImpl::stack2reg((offset + sizeof(float))>>2), f->as_VMReg()->next());
335 ret.set2(r->as_VMReg());
337 ret.set_pair(r->successor()->as_VMReg(), r->as_VMReg());
384 assert(F31->as_VMReg()->is_reg(), "overlapping stack/register numbers");
407 regs[i].set1(r->as_VMReg());
422 regs[i].set2(r->as_VMReg());
443 regs[i].set1(r->as_VMReg());
454 regs[i].set2(r->as_VMReg());
707 r_1 = G1_scratch->as_VMReg();// as part of the load/store shuffle
941 r_1 = F8->as_VMReg(); // as part of the load/store shuffle
1114 return as_oRegister(i)->as_VMReg();
1163 regs[i].set1(as_FloatRegister(1 + (j<<1))->as_VMReg());
1173 regs[i].set2(as_FloatRegister(j<<1)->as_VMReg());
1472 VMRegPair split(src.first(), L4->as_VMReg());
1497 split.set_pair(dst.first(), L5->as_VMReg());
2950 zero.set2(g0->as_VMReg());