Cross Reference: /openjdk7/hotspot/src/cpu/sparc/vm/sharedRuntime

Lines Matching refs:STACK_BIAS
151   __ stx(O0, SP, o0_offset+STACK_BIAS);
154   __ stx(O1, SP, o1_offset+STACK_BIAS);
158   __ stx(O2, SP, o2_offset+STACK_BIAS);
161   __ stx(O3, SP, o3_offset+STACK_BIAS);
164   __ stx(O4, SP, o4_offset+STACK_BIAS);
167   __ stx(O5, SP, o5_offset+STACK_BIAS);
178   __ stx(G1, SP, g1_offset+STACK_BIAS);
181   __ stx(G3, SP, g3_offset+STACK_BIAS);
184   __ stx(G4, SP, g4_offset+STACK_BIAS);
187   __ stx(G5, SP, g5_offset+STACK_BIAS);
209   __ stx(G5, SP, ccr_offset+STACK_BIAS);
210   __ stxfsr(SP, fsr_offset+STACK_BIAS);
216     __ stf(FloatRegisterImpl::D,  f, SP, offset+STACK_BIAS);
235     __ ldf(FloatRegisterImpl::D, SP, d00_offset+i*sizeof(float)+STACK_BIAS, as_FloatRegister(i));
238   __ ldx(SP, ccr_offset+STACK_BIAS, G1);
245   __ ldx(SP, g1_offset+STACK_BIAS, G1);
246   __ ldx(SP, g3_offset+STACK_BIAS, G3);
247   __ ldx(SP, g4_offset+STACK_BIAS, G4);
248   __ ldx(SP, g5_offset+STACK_BIAS, G5);
253   __ ldx(SP, o0_offset+STACK_BIAS, O0);
254   __ ldx(SP, o1_offset+STACK_BIAS, O1);
255   __ ldx(SP, o2_offset+STACK_BIAS, O2);
256   __ ldx(SP, o3_offset+STACK_BIAS, O3);
257   __ ldx(SP, o4_offset+STACK_BIAS, O4);
258   __ ldx(SP, o5_offset+STACK_BIAS, O5);
272   __ ldxfsr(SP, fsr_offset+STACK_BIAS);
294   __ ldx(SP, g1_offset+STACK_BIAS, G1);
297   __ ldx(SP, o0_offset+STACK_BIAS, O0);
298   __ ldx(SP, o1_offset+STACK_BIAS, O1);
304   __ ldf(FloatRegisterImpl::D, SP, d00_offset+STACK_BIAS, as_FloatRegister(0));
562   __ stx(G1, FP, -8 + STACK_BIAS);
563   __ stx(G4, FP, -16 + STACK_BIAS);
571   __ ldx(FP, -8 + STACK_BIAS, G1);
572   __ ldx(FP, -16 + STACK_BIAS, G4);
685   const int bias = STACK_BIAS;
984       int st_off = reg2offset(regs[i].first()) + STACK_BIAS;
1238     __ stf(FloatRegisterImpl::S, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS);
1241     __ stf(FloatRegisterImpl::D, F0, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS);
1249     __ ldf(FloatRegisterImpl::S, SP, frame_slots*VMRegImpl::stack_slot_size - 4+STACK_BIAS, F0);
1252     __ ldf(FloatRegisterImpl::D, SP, frame_slots*VMRegImpl::stack_slot_size - 8+STACK_BIAS, F0);
1280       __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1281       __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1284       __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register());
1288     __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS);
1302       __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1303       __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1306       __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register());
1310     __ st_ptr(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS);
1321       __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1322       __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1325       __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register());
1329     __ st_ptr(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS);
1351     __ add(FP, reg2offset(src.first()) + STACK_BIAS, rHandle);
1360       __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS);
1374     __ st_ptr(rOop, SP, offset + STACK_BIAS);
1379     __ add(SP, offset + STACK_BIAS, rHandle);
1388       __ st_ptr(rHandle, SP, reg2offset(dst.first()) + STACK_BIAS);
1402       __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1403       __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1407         __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register());
1409         __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister());
1415       __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS);
1417       __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS);
1427         __ st(src.first()->as_Register(), FP, -4 + STACK_BIAS);
1428         __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.first()->as_FloatRegister());
1432       __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), FP, -4 + STACK_BIAS);
1433       __ ld(FP, -4 + STACK_BIAS, dst.first()->as_Register());
1480       __ ldx(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register());
1534       __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1535       __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4);
1536       __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1537       __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS);
1542         __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4);
1544           __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register());
1546           __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister());
1549         __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS);
1554           __ ld(FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_Register());
1555           __ ld(FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_Register());
1557           __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.first()) + STACK_BIAS, dst.first()->as_FloatRegister());
1558           __ ldf(FloatRegisterImpl::S, FP, reg2offset(src.second()) + STACK_BIAS, dst.second()->as_FloatRegister());
1566       __ st(src.first()->as_Register(), SP, reg2offset(dst.first()) + STACK_BIAS);
1568         __ ld(FP, reg2offset(src.second()) + STACK_BIAS, L4);
1569         __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS);
1571         __ st(src.second()->as_Register(), SP, reg2offset(dst.second()) + STACK_BIAS);
1581           __ stf(FloatRegisterImpl::S, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS);
1582           __ stf(FloatRegisterImpl::S, src.second()->as_FloatRegister(), SP, reg2offset(dst.second()) + STACK_BIAS);
1584           __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), SP, reg2offset(dst.first()) + STACK_BIAS);
1598         __ stx(src.first()->as_Register(), FP, -8 + STACK_BIAS);
1599         __ stx(src.second()->as_Register(), FP, -4 + STACK_BIAS);
1601         __ ldf(FloatRegisterImpl::S, FP, -8 + STACK_BIAS, dst.first()->as_FloatRegister());
1602         __ ldf(FloatRegisterImpl::S, FP, -4 + STACK_BIAS, dst.second()->as_FloatRegister());
1607       __ stf(FloatRegisterImpl::D, src.first()->as_FloatRegister(), FP, -8 + STACK_BIAS);
1610       __ ld(FP, -8 + STACK_BIAS, dst.first()->as_Register());
1612         __ ld(FP, -4 + STACK_BIAS, dst.second()->as_Register());
1614         __ ld(FP, -4 + STACK_BIAS, L4);
1615         __ st(L4, SP, reg2offset(dst.second()) + STACK_BIAS);
1677           __ stx(reg, SP, offset + STACK_BIAS);
1679           __ ldx(SP, offset + STACK_BIAS, reg);
1686         __ stf(FloatRegisterImpl::D, in_regs[i].first()->as_FloatRegister(), SP, offset + STACK_BIAS);
1688         __ ldf(FloatRegisterImpl::D, SP, offset + STACK_BIAS, in_regs[i].first()->as_FloatRegister());
1700         __ stf(FloatRegisterImpl::S, in_regs[i].first()->as_FloatRegister(), SP, offset + STACK_BIAS);
1702         __ ldf(FloatRegisterImpl::S, SP, offset + STACK_BIAS, in_regs[i].first()->as_FloatRegister());
1812           RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS;
1852       RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS;
1873       RegisterOrConstant ld_off = reg2offset(r) + STACK_BIAS;
2329     __ st_ptr(O1, SP, klass_offset + STACK_BIAS);
2331     __ add(SP, klass_offset + STACK_BIAS, O1);
2417     __ add(FP, lock_offset+STACK_BIAS, L3_box);
2430     __ delayed() -> add(FP, lock_offset+STACK_BIAS, L3_box);
2471     __ st_ptr(FP, SP, FP->sp_offset_in_saved_window()*wordSize + STACK_BIAS);
2472     __ st_ptr(I7, SP, I7->sp_offset_in_saved_window()*wordSize + STACK_BIAS);
2627     __ add(SP, lock_offset+STACK_BIAS, L3_box);
2635     __ delayed()-> add(SP, lock_offset+STACK_BIAS, L3_box);
2989               assert(Assembler::is_simm13(reg2offset(src.first()) + STACK_BIAS),
2991               __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, in_reg);
3051                           STACK_BIAS), "must be");
3052                 __ st_ptr(s, SP, reg2offset(dst.first()) + STACK_BIAS);
3057                            STACK_BIAS), "must be");
3058                 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, d);
3061                              STACK_BIAS), "must be");
3062                   __ st_ptr(d, SP, reg2offset(dst.first()) + STACK_BIAS);
3071                          STACK_BIAS), "must be");
3072               __ st_ptr(G0, SP, reg2offset(dst.first()) + STACK_BIAS);
3088               STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size;
3105             int off = STACK_BIAS + reg2offset(dst.first());
3137           int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size;
3167           int off = STACK_BIAS + conversion_temp * VMRegImpl::stack_slot_size;
3221           assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS),
3223           __ ld_ptr(FP,  reg2offset(dst.first()) + STACK_BIAS, O0);
3233           assert(Assembler::is_simm13(reg2offset(dst.first()) + STACK_BIAS),
3235           __ st_ptr(O1, FP,  reg2offset(dst.first()) + STACK_BIAS);
3443   Address         saved_Freturn0_addr(FP, -sizeof(double) + STACK_BIAS);
3445   Address         saved_Greturn1_addr(FP, -sizeof(double) -sizeof(jlong) + STACK_BIAS);
3893   __ stx(G5_method, SP, RegisterSaver::G5_offset()+STACK_BIAS);
3897   __ stx(O0, SP, RegisterSaver::G3_offset()+STACK_BIAS);