Lines Matching refs:L5
548 __ mov(G5_method, L5);
560 __ mov(L5, G5_method);
564 __ mov(G5_method, L5);
573 __ mov(L5, G5_method);
1280 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1281 __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1302 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1303 __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1321 __ ld_ptr(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1322 __ st_ptr(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1350 Register rHandle = dst.first()->is_stack() ? L5 : dst.first()->as_Register();
1370 const Register rHandle = L5;
1402 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1403 __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1494 // msw is stack move to L5
1496 // we will move: src.hi (LSW) -> dst.lo, src.lo (MSW) -> L5
1497 split.set_pair(dst.first(), L5->as_VMReg());
1500 // src.lo -> src.lo/L5, src.hi -> dst.lo (the real reg)
1501 // msw -> src.lo/L5, lsw -> dst.lo
1506 __ sllx(split.first()->as_Register(), 32, L5);
1509 __ or3(L5, d, d);
1534 __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1536 __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
2701 __ ld_ptr(G2_thread, in_bytes(JavaThread::active_handles_offset()), L5);
2702 __ st_ptr(G0, L5, JNIHandleBlock::top_offset_in_bytes());
3348 __ mov(L0, L5);