Lines Matching defs:long_at

56   bool is_nop()                        { return long_at(0) == nop_instruction(); }
57 bool is_call() { return is_op(long_at(0), Assembler::call_op); }
58 bool is_sethi() { return (is_op2(long_at(0), Assembler::sethi_op2)
59 && inv_rd(long_at(0)) != G0); }
65 int x = long_at(0);
71 int x = long_at(0);
82 int x = long_at(0);
91 int x = long_at(0);
96 int x = long_at(0);
103 int x = long_at(0);
109 int x = long_at(0);
115 int x = long_at(0);
120 int x = long_at(0);
126 int x = long_at(0);
163 int long_at(int offset) const { return *(int*)addr_at(offset); }
201 void set_annul_bit() { set_long_at(0, long_at(0) | Assembler::annul(true)); }
361 address destination() const { return inv_wdisp(long_at(0), call_displacement_width) + instruction_address(); }
363 void set_destination(address dest) { set_long_at(0, set_wdisp(long_at(0), dest - instruction_address(), call_displacement_width)); }
464 return (address) data64(addr_at(0), long_at(jmpl_offset));
538 Register destination() { return inv_rd(long_at(sethi_offset)); }
597 Register destination() { return inv_rd(long_at(sethi_offset)); }
668 int i0 = long_at(0);
681 return is_immediate()? inv_simm(long_at(0), offset_width) :
687 set_long_at(0, set_simm(long_at(0), x, offset_width));
761 int i0 = long_at(0);
770 return is_immediate()? inv_simm(long_at(0), offset_width) :
776 set_long_at(0, set_simm(long_at(0), x, offset_width));
835 return (address) data64(instruction_address(), long_at(jmpl_offset));
839 set_long_at(jmpl_offset, set_data32_simm13( long_at(jmpl_offset), (intptr_t)dest));
843 return (address) data32(long_at(sethi_offset), long_at(jmpl_offset));
846 set_long_at(sethi_offset, set_data32_sethi( long_at(sethi_offset), (intptr_t)dest));
847 set_long_at(jmpl_offset, set_data32_simm13( long_at(jmpl_offset), (intptr_t)dest));
887 address jump_destination() const { return addr_at(0) + branch_destination_offset(long_at(0)); }
889 int patched_instr = patch_branch_destination_offset(dest - addr_at(0), long_at(0));
896 int x = long_at(0);