Cross Reference: /openjdk7/hotspot/src/cpu/sparc/vm/c1_LIRAssembler

Lines Matching refs:Assembler
52         return Assembler::is_simm13(value);
109         if (src->is_address() && Assembler::is_simm13(src->as_address_ptr()->disp())) {
117         if (dst->is_address() && Assembler::is_simm13(dst->as_address_ptr()->disp())) {
215         __ cmp_and_br_short(O7, G0, Assembler::notEqual, Assembler::pt, L);
298     __ br(Assembler::greater, true, Assembler::pt, Lskip);
304     __ br(Assembler::equal, true, Assembler::pn, Ldone);
327     __ br(Assembler::notZero, false, Assembler::pn, Ldone);
330     __ br(Assembler::notZero, true, Assembler::pt, Lloop);
378     __ br(Assembler::always, false, Assembler::pt, *slow_case->entry());
538     assert(Assembler::is_simm13(divisor), "can only handle simm13");
586     assert(Assembler::is_simm13(divisor), "can only handle simm13");
591   __ br(Assembler::overflowSet, true, Assembler::pn, skip);
592   __ delayed()->Assembler::sethi(0x80000000, (op->code() == lir_idiv ? Rresult : Rscratch));
615     __ br(Assembler::always, false, Assembler::pt, *(op->label()));
619     Assembler::Condition acond;
621       case lir_cond_equal:         acond = Assembler::f_equal;    break;
622       case lir_cond_notEqual:      acond = Assembler::f_notEqual; break;
623       case lir_cond_less:          acond = (is_unordered ? Assembler::f_unorderedOrLess          : Assembler::f_less);           break;
624       case lir_cond_greater:       acond = (is_unordered ? Assembler::f_unorderedOrGreater       : Assembler::f_greater);        break;
625       case lir_cond_lessEqual:     acond = (is_unordered ? Assembler::f_unorderedOrLessOrEqual   : Assembler::f_lessOrEqual);    break;
626       case lir_cond_greaterEqual:  acond = (is_unordered ? Assembler::f_unorderedOrGreaterOrEqual: Assembler::f_greaterOrEqual); break;
633     __ fb( acond, false, Assembler::pn, *(op->label()));
637     Assembler::Condition acond;
639       case lir_cond_equal:        acond = Assembler::equal;                break;
640       case lir_cond_notEqual:     acond = Assembler::notEqual;             break;
641       case lir_cond_less:         acond = Assembler::less;                 break;
642       case lir_cond_lessEqual:    acond = Assembler::lessEqual;            break;
643       case lir_cond_greaterEqual: acond = Assembler::greaterEqual;         break;
644       case lir_cond_greater:      acond = Assembler::greater;              break;
645       case lir_cond_aboveEqual:   acond = Assembler::greaterEqualUnsigned; break;
646       case lir_cond_belowEqual:   acond = Assembler::lessEqualUnsigned;    break;
657       __ br(acond, false, Assembler::pn, *(op->label()));
660       __ brx(acond, false, Assembler::pn, *(op->label()));
700       __ fcmp(FloatRegisterImpl::S, Assembler::fcc0, rsrc, rsrc);
704       __ fb(Assembler::f_unordered, true, Assembler::pn, L);
783   if (Assembler::is_simm13(op->vtable_offset())) {
798   if (!Assembler::is_simm13(offset + (type == T_LONG) ? wordSize : 0)) {
824         assert(Assembler::is_simm13(offset + 4), "must be");
851             assert(Assembler::is_simm13(offset + 4), "must be");
910   if (!Assembler::is_simm13(offset + (type == T_LONG) ? wordSize : 0)) {
1102       } else if (Assembler::is_simm13(value)) {
1109         assert(Assembler::is_simm13(addr->disp()), "can't handle larger addresses");
1117       assert(Assembler::is_simm13(addr->disp()) &&
1118              Assembler::is_simm13(addr->disp() + 4), "can't handle larger addresses");
1151         assert(Assembler::is_simm13(addr->disp()), "can't handle larger addresses");
1370     if (!Assembler::is_simm13(disp_value) && (!unaligned || Assembler::is_simm13(disp_value + 4))) {
1391   assert(disp_reg != noreg || Assembler::is_simm13(disp_value), "should have set this up");
1411     __ prefetch(from_addr, Assembler::severalReads);
1421     __ prefetch(from_addr, Assembler::severalWritesAndPossiblyReads);
1516     if (!Assembler::is_simm13(disp_value) && (!unaligned || Assembler::is_simm13(disp_value + 4))) {
1537   assert(disp_reg != noreg || Assembler::is_simm13(disp_value), "should have set this up");
1616     __ fcmp(FloatRegisterImpl::S, Assembler::fcc0, opr1->as_float_reg(), opr2->as_float_reg());
1618     __ fcmp(FloatRegisterImpl::D, Assembler::fcc0, opr1->as_double_reg(), opr2->as_double_reg());
1624             if (Assembler::is_simm13(con)) {
1723   Assembler::Condition acond;
1725     case lir_cond_equal:        acond = Assembler::equal;        break;
1726     case lir_cond_notEqual:     acond = Assembler::notEqual;     break;
1727     case lir_cond_less:         acond = Assembler::less;         break;
1728     case lir_cond_lessEqual:    acond = Assembler::lessEqual;    break;
1729     case lir_cond_greaterEqual: acond = Assembler::greaterEqual; break;
1730     case lir_cond_greater:      acond = Assembler::greater;      break;
1731     case lir_cond_aboveEqual:   acond = Assembler::greaterEqualUnsigned;      break;
1732     case lir_cond_belowEqual:   acond = Assembler::lessEqualUnsigned;      break;
1740     if (!Assembler::is_simm13(opr1->as_jint())) {
1755       __ br(acond, false, Assembler::pt, skip);
1758       __ brx(acond, false, Assembler::pt, skip); // checks icc on 32bit and xcc on 64bit
1761     if (Assembler::is_simm13(opr1->as_jint())) {
1886       assert(Assembler::is_simm13(con), "must be simm13");
1947       assert(c == (int)c && Assembler::is_simm13(c), "out of range");
2056   __ br(Assembler::always, false, Assembler::pt, _unwind_handler_entry);
2113       __ cmp_zero_and_br(Assembler::less, O0, *stub->entry());
2116       __ cmp_zero_and_br(Assembler::less, O0, *stub->entry());
2128     __ brx(Assembler::equal, false, Assembler::pn, *stub->entry());
2134     __ brx(Assembler::equal, false, Assembler::pn, *stub->entry());
2140     __ cmp_zero_and_br(Assembler::less, src_pos, *stub->entry());
2146     __ cmp_zero_and_br(Assembler::less, dst_pos, *stub->entry());
2152     __ cmp_zero_and_br(Assembler::less, length, *stub->entry());
2160     __ br(Assembler::carrySet, false, Assembler::pn, *stub->entry());
2168     __ br(Assembler::carrySet, false, Assembler::pn, *stub->entry());
2183         __ br(Assembler::notEqual, false, Assembler::pt, *stub->entry());
2188         __ brx(Assembler::notEqual, false, Assembler::pt, *stub->entry());
2211         __ br(Assembler::notEqual, false, Assembler::pt, cont);
2233           __ br(Assembler::notEqual, false, Assembler::pt,  *stub->entry());
2272           __ br_notnull_short(O0, Assembler::pn, failed);
2278         __ br_null(O0, false, Assembler::pt,  *stub->continuation());
2289         __ br(Assembler::always, false, Assembler::pt, *stub->entry());
2294         __ br(Assembler::equal, false, Assembler::pn, *stub->entry());
2321         __ br(Assembler::notEqual, false, Assembler::pn, halt);
2324         __ cmp_and_br_short(tmp, tmp2, Assembler::equal, Assembler::pn, known_ok);
2327         __ br(Assembler::equal, false, Assembler::pn, known_ok);
2329         __ brx(Assembler::equal, false, Assembler::pn, known_ok);
2336         __ brx(Assembler::notEqual, false, Assembler::pn, halt);
2338         __ cmp_and_brx_short(tmp, tmp2, Assembler::equal, Assembler::pn, known_ok);
2341         __ brx(Assembler::equal, false, Assembler::pn, known_ok);
2343         __ brx(Assembler::equal, false, Assembler::pn, known_ok);
2481     __ br(Assembler::notEqual, false, Assembler::pn, *op->stub()->entry());
2508     __ br(Assembler::always, false, Assembler::pt, *op->stub()->entry());
2536     __ cmp_and_brx_short(recv, tmp1, Assembler::notEqual, Assembler::pt, next_test);
2553     __ br_notnull_short(tmp1, Assembler::pt, next_test);
2572   if (!Assembler::is_simm13(md->byte_offset_of_slot(data, DataLayout::header_offset()) + data->size_in_bytes())) {
2604     __ br_notnull_short(obj, Assembler::pn, not_null);
2620     __ br_null(obj, false, Assembler::pn, *obj_is_null);
2643     __ brx(Assembler::notEqual, false, Assembler::pt, *failure_target);
2666       __ br(Assembler::equal, false, Assembler::pn, *failure_target);
2730       __ br_notnull_short(value, Assembler::pn, not_null);
2745       __ br_null_short(value, Assembler::pn, done);
2761     __ br(Assembler::equal, false, Assembler::pn, *failure_target);
2939       __ br(Assembler::always, false, Assembler::pt, *op->stub()->entry());
2954       __ br(Assembler::always, false, Assembler::pt, *op->stub()->entry());
2983   if (!Assembler::is_simm13(md->byte_offset_of_slot(data, CounterData::count_offset()) +
3100     _masm->trap(Assembler::notEqual, Assembler::ptr_cc, G0, ST_RESERVED_FOR_USER_0+2 );
3176       if (!Assembler::is_simm13(disp)) {
3248   __ membar( Assembler::Membar_mask_bits(Assembler::StoreLoad) );
3261   //__ membar(Assembler::Membar_mask_bits(Assembler::loadload));
3266   //__ membar(Assembler::Membar_mask_bits(Assembler::storestore));
3271   //__ membar(Assembler::Membar_mask_bits(Assembler::loadstore));
3275   __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
3306   assert(addr->index()->is_illegal() && addr->scale() == LIR_Address::times_1 && Assembler::is_simm13(addr->disp()), "can't handle complex addresses yet");