Cross Reference: /openjdk7/hotspot/src/cpu/sparc/vm/c1_LIRAssembler

Lines Matching defs:dst
80       LIR_Opr dst = op1->result_opr();
82       if (src == dst) {
84         // this works around a problem where moves with the same src and dst
98       if (src->is_double_cpu() || dst->is_double_cpu() || op1->patch_code() != lir_patch_none ||
99           ((src->is_double_fpu() || dst->is_double_fpu()) && op1->move_kind() != lir_move_normal)) {
104         if (dst->is_address() && !dst->is_stack() && (dst->type() == T_OBJECT || dst->type() == T_ARRAY)) return false;
108       if (dst->is_register()) {
117         if (dst->is_address() && Assembler::is_simm13(dst->as_address_ptr()->disp())) {
119         } else if (dst->is_single_stack()) {
124       if (dst->is_register() &&
125           ((src->is_register() && src->is_single_word() && src->is_same_type(dst)) ||
233 void LIR_Assembler::emit_string_compare(LIR_Opr left, LIR_Opr right, LIR_Opr dst, CodeEmitInfo* info) {
239   Register result = dst->as_register();
668   LIR_Opr dst = op->result_opr();
672       Register rlo  = dst->as_register_lo();
673       Register rhi  = dst->as_register_hi();
686       FloatRegister rdst = is_double ? dst->as_double_reg() : dst->as_float_reg();
697       Address       addr = frame_map()->address_for_slot(dst->single_stack_ix());
715       Register rdst = dst->as_register();
726       assert((!is_double && dst->is_single_fpu()) || (is_double && dst->is_double_fpu()), "check");
729       FloatRegister rdst = is_double ? dst->as_double_reg() : dst->as_float_reg();
738       Register rdst = dst->as_register();
746       Register rdst = dst->as_register();
1698 void LIR_Assembler::comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst, LIR_Op2* op){
1702       __ float_cmp(true, is_unordered_less ? -1 : 1, left->as_float_reg(), right->as_float_reg(), dst->as_register());
1704       __ float_cmp(false, is_unordered_less ? -1 : 1, left->as_double_reg(), right->as_double_reg(), dst->as_register());
1710     __ lcmp(left->as_register_lo(), right->as_register_lo(), dst->as_register());
1714             dst->as_register());
2063   Register dst = op->dst()->as_register();
2092     __ mov(dst,     O2);
2125   // make sure src and dst are non-null and load array length
2133     __ tst(dst);
2165     __ ld(dst, arrayOopDesc::length_offset_in_bytes(), tmp2);
2181         __ lduw(dst, oopDesc::klass_offset_in_bytes(), tmp2);
2186         __ ld_ptr(dst, oopDesc::klass_offset_in_bytes(), tmp2);
2192       // For object arrays, if src is a sub class of dst then we can
2200       __ load_klass(dst, G1);
2209         // src is not a sub class of dst so we have to do a
2224             __ load_klass(dst, tmp);
2251         __ add(dst, arrayOopDesc::base_offset_in_bytes(basic_type), dst_ptr);
2259         __ load_klass(dst, tmp);
2305     // dst.klass each exactly matching the default type.  For the
2307     // dst type is exactly the expected type and the src type is a
2308     // subtype which we can't check or src is the same array as dst
2316       // load the raw value of the dst klass, since we will be comparing
2318       __ lduw(dst, oopDesc::klass_offset_in_bytes(), tmp2);
2328         __ delayed()->cmp(src, dst);
2333       __ ld_ptr(dst, oopDesc::klass_offset_in_bytes(), tmp2);
2342         __ delayed()->cmp(src, dst);
2372   __ add(dst, arrayOopDesc::base_offset_in_bytes(basic_type), dst_ptr);
2585   Register dst = op->result_opr()->as_register();
2794     Register dst = op->result_opr()->as_register();
2798     __ mov(obj, dst);
2801     Register dst = op->result_opr()->as_register();
2805     __ set(0, dst);
2808     __ set(1, dst);
2904   Register dst = dst_opr->as_register();
2909     __ add(reg, offset, dst);
2911     __ set(offset, dst);
2912     __ add(dst, reg, dst);
3281 // src and src->successor() are packed into dst
3282 // src and dst may be the same register.
3284 void LIR_Assembler::pack64(LIR_Opr src, LIR_Opr dst) {
3286   Register rd = dst->as_register_lo();
3294 // src is unpacked into dst and dst->successor()
3295 void LIR_Assembler::unpack64(LIR_Opr src, LIR_Opr dst) {
3297   Register rd = dst->as_register_hi();