Cross Reference: /openjdk7/hotspot/src/cpu/sparc/vm/c1_LIRAssembler

Lines Matching defs:base
351   Register reg = mon_addr.base();
708       __ stf(FloatRegisterImpl::S, rsrc, addr.base(), addr.disp());
796 int LIR_Assembler::store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide, bool unaligned) {
802     store_offset = store(from_reg, base, O7, type, wide);
810       case T_BYTE  : __ stb(from_reg->as_register(), base, offset); break;
811       case T_CHAR  : __ sth(from_reg->as_register(), base, offset); break;
812       case T_SHORT : __ sth(from_reg->as_register(), base, offset); break;
813       case T_INT   : __ stw(from_reg->as_register(), base, offset); break;
818           __ stw(from_reg->as_register_lo(), base, offset + lo_word_offset_in_bytes);
819           __ stw(O7,                         base, offset + hi_word_offset_in_bytes);
821           __ stx(from_reg->as_register_lo(), base, offset);
825         __ stw(from_reg->as_register_lo(), base, offset + lo_word_offset_in_bytes);
826         __ stw(from_reg->as_register_hi(), base, offset + hi_word_offset_in_bytes);
830         __ st_ptr(from_reg->as_register(), base, offset);
838             __ stw(G3_scratch, base, offset);
840             __ st_ptr(from_reg->as_register(), base, offset);
845       case T_FLOAT : __ stf(FloatRegisterImpl::S, from_reg->as_float_reg(), base, offset); break;
852             __ stf(FloatRegisterImpl::S, reg->successor(), base, offset + 4);
853             __ stf(FloatRegisterImpl::S, reg,              base, offset);
855             __ stf(FloatRegisterImpl::D, reg, base, offset);
866 int LIR_Assembler::store(LIR_Opr from_reg, Register base, Register disp, BasicType type, bool wide) {
873     case T_BYTE  : __ stb(from_reg->as_register(), base, disp); break;
874     case T_CHAR  : __ sth(from_reg->as_register(), base, disp); break;
875     case T_SHORT : __ sth(from_reg->as_register(), base, disp); break;
876     case T_INT   : __ stw(from_reg->as_register(), base, disp); break;
879       __ stx(from_reg->as_register_lo(), base, disp);
882       __ std(from_reg->as_register_hi(), base, disp);
886       __ st_ptr(from_reg->as_register(), base, disp);
894           __ stw(G3_scratch, base, disp);
896           __ st_ptr(from_reg->as_register(), base, disp);
900     case T_FLOAT : __ stf(FloatRegisterImpl::S, from_reg->as_float_reg(), base, disp); break;
901     case T_DOUBLE: __ stf(FloatRegisterImpl::D, from_reg->as_double_reg(), base, disp); break;
908 int LIR_Assembler::load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide, bool unaligned) {
911     assert(base != O7, "destroying register");
915     load_offset = load(base, O7, to_reg, type, wide);
920       case T_BYTE  : __ ldsb(base, offset, to_reg->as_register()); break;
921       case T_CHAR  : __ lduh(base, offset, to_reg->as_register()); break;
922       case T_SHORT : __ ldsh(base, offset, to_reg->as_register()); break;
923       case T_INT   : __ ld(base, offset, to_reg->as_register()); break;
927           __ ldx(base, offset, to_reg->as_register_lo());
931           __ ldd(base, offset, to_reg->as_register_hi());
935           assert(base != to_reg->as_register_lo(), "can't handle this");
937           __ ld(base, offset + hi_word_offset_in_bytes, to_reg->as_register_lo());
938           __ lduw(base, offset + lo_word_offset_in_bytes, O7); // in case O7 is base or offset, use it last
942           if (base == to_reg->as_register_lo()) {
943             __ ld(base, offset + hi_word_offset_in_bytes, to_reg->as_register_hi());
944             __ ld(base, offset + lo_word_offset_in_bytes, to_reg->as_register_lo());
946             __ ld(base, offset + lo_word_offset_in_bytes, to_reg->as_register_lo());
947             __ ld(base, offset + hi_word_offset_in_bytes, to_reg->as_register_hi());
952       case T_ADDRESS:  __ ld_ptr(base, offset, to_reg->as_register()); break;
957             __ lduw(base, offset, to_reg->as_register());
960             __ ld_ptr(base, offset, to_reg->as_register());
964       case T_FLOAT:  __ ldf(FloatRegisterImpl::S, base, offset, to_reg->as_float_reg()); break;
970             __ ldf(FloatRegisterImpl::S, base, offset + 4, reg->successor());
971             __ ldf(FloatRegisterImpl::S, base, offset,     reg);
973             __ ldf(FloatRegisterImpl::D, base, offset, to_reg->as_double_reg());
987 int LIR_Assembler::load(Register base, Register disp, LIR_Opr to_reg, BasicType type, bool wide) {
991     case T_BYTE  :  __ ldsb(base, disp, to_reg->as_register()); break;
992     case T_CHAR  :  __ lduh(base, disp, to_reg->as_register()); break;
993     case T_SHORT :  __ ldsh(base, disp, to_reg->as_register()); break;
994     case T_INT   :  __ ld(base, disp, to_reg->as_register()); break;
995     case T_ADDRESS: __ ld_ptr(base, disp, to_reg->as_register()); break;
1000             __ lduw(base, disp, to_reg->as_register());
1003             __ ld_ptr(base, disp, to_reg->as_register());
1007     case T_FLOAT:  __ ldf(FloatRegisterImpl::S, base, disp, to_reg->as_float_reg()); break;
1008     case T_DOUBLE: __ ldf(FloatRegisterImpl::D, base, disp, to_reg->as_double_reg()); break;
1011       __ ldx(base, disp, to_reg->as_register_lo());
1015       __ ldd(base, disp, to_reg->as_register_hi());
1039       __ stw(src_reg, addr.base(), addr.disp());
1051       __ st_ptr(src_reg, addr.base(), addr.disp());
1058       __ st_ptr(src_reg, addr.base(), addr.disp());
1072       __ stw(tmp, addr.base(), addr.disp() + lo_word_offset_in_bytes);
1079       __ stw(tmp, addr.base(), addr.disp() + hi_word_offset_in_bytes);
1091   Register base = addr->base()->as_pointer_register();
1107         offset = store(tmp, base, addr->index()->as_pointer_register(), type, wide);
1110         offset = store(tmp, base, addr->disp(), type, wide, false);
1127       offset = store(tmp, base, addr->disp() + lo_word_offset_in_bytes, T_INT, wide, false);
1134       store(tmp, base, addr->disp() + hi_word_offset_in_bytes, T_INT, wide, false);
1149         offset = store(tmp, base, addr->index()->as_pointer_register(), type, wide);
1152         offset = store(tmp, base, addr->disp(), type, wide, false);
1286   Register reg = addr->base()->as_register();
1304       __ lduw(from.base(), from.disp(), tmp);
1305       __ stw(tmp, to.base(), to.disp());
1312       __ ld_ptr(from.base(), from.disp(), tmp);
1313       __ st_ptr(tmp, to.base(), to.disp());
1321       __ lduw(from.base(), from.disp(), tmp);
1322       __ stw(tmp, to.base(), to.disp());
1323       __ lduw(from.base(), from.disp() + 4, tmp);
1324       __ stw(tmp, to.base(), to.disp() + 4);
1335   Address base = as_Address(addr);
1336   return Address(base.base(), base.disp() + hi_word_offset_in_bytes);
1341   Address base = as_Address(addr);
1342   return Address(base.base(), base.disp() + lo_word_offset_in_bytes);
1352   Register src = addr->base()->as_pointer_register();
1357   if (addr->base()->type() == T_OBJECT) {
1435   load(addr.base(), addr.disp(), dest, dest->type(), true /*wide*/, unaligned);
1447   store(from_reg, addr.base(), addr.disp(), from_reg->type(), true /*wide*/, unaligned);
1498   Register src = addr->base()->as_pointer_register();
1503   if (addr->base()->is_oop_register()) {
2573     // The offset is large so bias the mdo by the base of the slot so
2905   Register reg = mon_addr.base();
2985     // The offset is large so bias the mdo by the base of the slot so
3187     Register base = mem_addr->base()->as_register();
3198           __ stx(G4, base, disp);
3200           __ stx(G4, base, idx);
3207           __ std(G4, base, disp);
3209           __ std(G4, base, idx);
3216           __ ldx(base, disp, G5);
3218           __ ldx(base, idx, G5);
3224           __ ldd(base, disp, G4);
3226           __ ldd(base, idx, G4);
3308   __ add(addr->base()->as_pointer_register(), addr->disp(), dest->as_pointer_register());