Cross Reference: /openjdk7/hotspot/src/cpu/sparc/vm/assembler

Lines Matching refs:offset
46 inline bool Address::is_simm13(int offset) { return Assembler::is_simm13(disp() + offset); }
122 inline void Assembler::ldf(FloatRegisterImpl::Width w, const Address& a, FloatRegister d, int offset) { relocate(a.rspec(offset)); ldf( w, a.base(), a.disp() + offset, d); }
173 inline void Assembler::ld(  const Address& a, Register d, int offset) {
174   if (a.has_index()) { assert(offset == 0, ""); ld(  a.base(), a.index(),         d); }
175   else               {                          ld(  a.base(), a.disp() + offset, d); }
177 inline void Assembler::ldsb(const Address& a, Register d, int offset) {
178   if (a.has_index()) { assert(offset == 0, ""); ldsb(a.base(), a.index(),         d); }
179   else               {                          ldsb(a.base(), a.disp() + offset, d); }
181 inline void Assembler::ldsh(const Address& a, Register d, int offset) {
182   if (a.has_index()) { assert(offset == 0, ""); ldsh(a.base(), a.index(),         d); }
183   else               {                          ldsh(a.base(), a.disp() + offset, d); }
185 inline void Assembler::ldsw(const Address& a, Register d, int offset) {
186   if (a.has_index()) { assert(offset == 0, ""); ldsw(a.base(), a.index(),         d); }
187   else               {                          ldsw(a.base(), a.disp() + offset, d); }
189 inline void Assembler::ldub(const Address& a, Register d, int offset) {
190   if (a.has_index()) { assert(offset == 0, ""); ldub(a.base(), a.index(),         d); }
191   else               {                          ldub(a.base(), a.disp() + offset, d); }
193 inline void Assembler::lduh(const Address& a, Register d, int offset) {
194   if (a.has_index()) { assert(offset == 0, ""); lduh(a.base(), a.index(),         d); }
195   else               {                          lduh(a.base(), a.disp() + offset, d); }
197 inline void Assembler::lduw(const Address& a, Register d, int offset) {
198   if (a.has_index()) { assert(offset == 0, ""); lduw(a.base(), a.index(),         d); }
199   else               {                          lduw(a.base(), a.disp() + offset, d); }
201 inline void Assembler::ldd( const Address& a, Register d, int offset) {
202   if (a.has_index()) { assert(offset == 0, ""); ldd( a.base(), a.index(),         d); }
203   else               {                          ldd( a.base(), a.disp() + offset, d); }
205 inline void Assembler::ldx( const Address& a, Register d, int offset) {
206   if (a.has_index()) { assert(offset == 0, ""); ldx( a.base(), a.index(),         d); }
207   else               {                          ldx( a.base(), a.disp() + offset, d); }
221 inline void Assembler::add(const Address& a, Register d, int offset) {
223   else               { add(a.base(), a.disp() + offset, d, a.rspec(offset)); offset = 0; }
224   if (offset != 0)     add(d,        offset,            d);
226 inline void Assembler::add(Register s1, RegisterOrConstant s2, Register d, int offset) {
228   else                 { add(s1, s2.as_constant() + offset, d); offset = 0; }
229   if (offset != 0)       add(d,  offset,                    d);
244 inline void Assembler::prefetch(const Address& a, PrefetchFcn f, int offset) { v9_only(); relocate(a.rspec(offset)); prefetch(a.base(), a.disp() + offset, f); }
262 inline void Assembler::stf(    FloatRegisterImpl::Width w, FloatRegister d, const Address& a, int offset) {
263   relocate(a.rspec(offset));
264   if (a.has_index()) { assert(offset == 0, ""); stf(w, d, a.base(), a.index()        ); }
265   else               {                          stf(w, d, a.base(), a.disp() + offset); }
296 inline void Assembler::stb(Register d, const Address& a, int offset) {
297   if (a.has_index()) { assert(offset == 0, ""); stb(d, a.base(), a.index()        ); }
298   else               {                          stb(d, a.base(), a.disp() + offset); }
300 inline void Assembler::sth(Register d, const Address& a, int offset) {
301   if (a.has_index()) { assert(offset == 0, ""); sth(d, a.base(), a.index()        ); }
302   else               {                          sth(d, a.base(), a.disp() + offset); }
304 inline void Assembler::stw(Register d, const Address& a, int offset) {
305   if (a.has_index()) { assert(offset == 0, ""); stw(d, a.base(), a.index()        ); }
306   else               {                          stw(d, a.base(), a.disp() + offset); }
308 inline void Assembler::st( Register d, const Address& a, int offset) {
309   if (a.has_index()) { assert(offset == 0, ""); st( d, a.base(), a.index()        ); }
310   else               {                          st( d, a.base(), a.disp() + offset); }
312 inline void Assembler::std(Register d, const Address& a, int offset) {
313   if (a.has_index()) { assert(offset == 0, ""); std(d, a.base(), a.index()        ); }
314   else               {                          std(d, a.base(), a.disp() + offset); }
316 inline void Assembler::stx(Register d, const Address& a, int offset) {
317   if (a.has_index()) { assert(offset == 0, ""); stx(d, a.base(), a.index()        ); }
318   else               {                          stx(d, a.base(), a.disp() + offset); }
339 inline void Assembler::sub(Register s1, RegisterOrConstant s2, Register d, int offset) {
341   else                 { sub(s1, s2.as_constant() + offset, d); offset = 0; }
342   if (offset != 0)       sub(d,  offset,                    d);
350 inline void Assembler::swap(    Address& a, Register d, int offset ) {
351   relocate(a.rspec(offset));
352   if (a.has_index()) { assert(offset == 0, ""); swap( a.base(), a.index(), d         ); }
353   else               {                          swap( a.base(), a.disp() + offset, d ); }
389 inline void MacroAssembler::ld_ptr(const Address& a, Register d, int offset) {
391   Assembler::ldx(a, d, offset);
393   Assembler::ld( a, d, offset);
428 inline void MacroAssembler::st_ptr(Register d, const Address& a, int offset) {
430   Assembler::stx(d, a, offset);
432   Assembler::st( d, a, offset);
461 inline void MacroAssembler::ld_long(const Address& a, Register d, int offset) {
463   Assembler::ldx(a, d, offset);
465   Assembler::ldd(a, d, offset);
493 inline void MacroAssembler::st_long( Register d, const Address& a, int offset ) {
495   Assembler::stx(d, a, offset);
497   Assembler::std(d, a, offset);
657   int x = offset();
667   return offset() - x;
688 inline void MacroAssembler::load_contents(const AddressLiteral& addrlit, Register d, int offset) {
695   ld(d, addrlit.low10() + offset, d);
699 inline void MacroAssembler::load_bool_contents(const AddressLiteral& addrlit, Register d, int offset) {
706   ldub(d, addrlit.low10() + offset, d);
710 inline void MacroAssembler::load_ptr_contents(const AddressLiteral& addrlit, Register d, int offset) {
717   ld_ptr(d, addrlit.low10() + offset, d);
721 inline void MacroAssembler::store_contents(Register s, const AddressLiteral& addrlit, Register temp, int offset) {
728   st(s, temp, addrlit.low10() + offset);
732 inline void MacroAssembler::store_ptr_contents(Register s, const AddressLiteral& addrlit, Register temp, int offset) {
739   st_ptr(s, temp, addrlit.low10() + offset);
744 inline void MacroAssembler::jumpl_to(const AddressLiteral& addrlit, Register temp, Register d, int offset) {
749   jmpl(temp, addrlit.low10() + offset, d);
753 inline void MacroAssembler::jump_to(const AddressLiteral& addrlit, Register temp, int offset) {
754   jumpl_to(addrlit, temp, G0, offset);