Lines Matching refs:addrlit
677 void MacroAssembler::jumpl(const AddressLiteral& addrlit, Register temp, Register d, int offset, const char* file, int line) {
681 patchable_sethi(addrlit, temp);
682 Address a(temp, addrlit.low10() + offset); // Add the offset to the displacement.
687 add(a.base(), a.disp(), a.base(), addrlit.rspec(offset));
723 void MacroAssembler::jump(const AddressLiteral& addrlit, Register temp, int offset, const char* file, int line) {
724 jumpl(addrlit, temp, G0, offset, file, line);
1282 void MacroAssembler::internal_sethi(const AddressLiteral& addrlit, Register d, bool ForceRelocatable) {
1292 int msb32 = (int) (addrlit.value() >> 32);
1293 int lsb32 = (int) (addrlit.value());
1296 Assembler::sethi(lsb32, d, addrlit.rspec());
1299 Assembler::sethi(~lsb32, d, addrlit.rspec());
1303 Assembler::sethi(msb32, d, addrlit.rspec()); // msb 22-bits
1327 if (ForceRelocatable || (addrlit.rtype() != relocInfo::none &&
1328 addrlit.rtype() != relocInfo::runtime_call_type)) {
1333 Assembler::sethi(addrlit.value(), d, addrlit.rspec());
1338 void MacroAssembler::sethi(const AddressLiteral& addrlit, Register d) {
1339 internal_sethi(addrlit, d, false);
1343 void MacroAssembler::patchable_sethi(const AddressLiteral& addrlit, Register d) {
1344 internal_sethi(addrlit, d, true);
1380 void MacroAssembler::internal_set(const AddressLiteral& addrlit, Register d, bool ForceRelocatable) {
1381 intptr_t value = addrlit.value();
1383 if (!ForceRelocatable && addrlit.rspec().type() == relocInfo::none) {
1390 sethi(addrlit, d);
1395 internal_sethi(addrlit, d, ForceRelocatable);
1396 if (ForceRelocatable || addrlit.rspec().type() != relocInfo::none || addrlit.low10() != 0) {
1397 add(d, addrlit.low10(), d, addrlit.rspec());
4232 AddressLiteral addrlit(counter_addr);
4233 sethi(addrlit, Rtmp1); // Move hi22 bits into temporary register.
4234 Address addr(Rtmp1, addrlit.low10()); // Build an address with low10 bits.
4522 AddressLiteral addrlit(byte_map_base);
4523 __ set(addrlit, O1); // O1 := <card table base>