Lines Matching refs:O1

258   casxa( O1, O2, O3, 0 );
312 ldf( FloatRegisterImpl::S, O0, O1, F15 );
332 lduh( O1, O2, O3 );
345 ldswa( L7, O0, (1 << 8) - 1, O1 );
359 ldstub( O0, -1, O1 );
613 add(G2_thread, in_bytes(JavaThread::jmp_ring_offset()), O1);
615 add(O2, O1, O1);
623 delayed()->st(O2, O1, 0);
627 st(O7, O1, sizeof(intptr_t));
629 st(O3, O1, 2*sizeof(intptr_t));
631 st(O4, O1, 3*sizeof(intptr_t));
648 add(G2_thread, in_bytes(JavaThread::jmp_ring_offset()), O1);
650 add(O2, O1, O1);
658 delayed()->st(O2, O1, 0);
662 st(O7, O1, sizeof(intptr_t));
664 st(O3, O1, 2*sizeof(intptr_t));
666 st(O4, O1, 3*sizeof(intptr_t));
691 add(G2_thread, in_bytes(JavaThread::jmp_ring_offset()), O1);
693 add(O2, O1, O1);
701 delayed()->st(a.base()->after_save(), O1, 0);
705 st(O7, O1, sizeof(intptr_t));
707 st(O3, O1, 2*sizeof(intptr_t));
709 st(O4, O1, 3*sizeof(intptr_t));
1126 mov(arg_1, O1);
1133 mov(arg_1, O1);
1134 mov(arg_2, O2); assert(arg_2 != O1, "smashed argument");
1141 mov(arg_1, O1);
1142 mov(arg_2, O2); assert(arg_2 != O1, "smashed argument");
1143 mov(arg_3, O3); assert(arg_3 != O1 && arg_3 != O2, "smashed argument");
1162 mov(arg_1, O1);
1169 mov(arg_1, O1);
1170 mov(arg_2, O2); assert(arg_2 != O1, "smashed argument");
1177 mov(arg_1, O1);
1178 mov(arg_2, O2); assert(arg_2 != O1, "smashed argument");
1179 mov(arg_3, O3); assert(arg_3 != O1 && arg_3 != O2, "smashed argument");
1213 mov(arg_2, O1); assert(arg_2 != O0, "smashed argument");
1220 mov(arg_2, O1); assert(arg_2 != O0, "smashed argument");
1221 mov(arg_3, O2); assert(arg_3 != O0 && arg_3 != O1, "smashed argument");
1782 stx(O1,SP,frame::register_save_words*wordSize+STACK_BIAS+1*8);
1787 patchable_set((intptr_t)real_msg, O1);
1820 stx(O1,SP,frame::register_save_words*wordSize+STACK_BIAS+1*8);
1825 patchable_set((intptr_t)real_msg, O1);
1917 ldx(SP,frame::register_save_words*wordSize+STACK_BIAS+1*8,O1);
1941 mov(I1, O1);
1971 patchable_set((intptr_t)msg, O1);
2030 mov(I0, O1); // addr of reg save area
2032 // We expect pointer to message in I1. Caller must set it up in O1
4090 Register t3 = O1;
4523 __ set(addrlit, O1); // O1 := <card table base>
4524 __ ldub(O0, O1, O2); // O2 := [O0 + O1]
4537 // Get O0 + O1 into a reg by itself
4538 __ add(O0, O1, O3);