Lines Matching defs:base
55 Address Address::make_raw(int base, int index, int scale, int disp, bool disp_is_oop) {
64 Address madr(as_Register(base), rindex);
68 Address madr(as_Register(base), disp);
687 add(a.base(), a.disp(), a.base(), addrlit.rspec(offset));
701 delayed()->st(a.base()->after_save(), O1, 0);
714 jmpl(a.base(), G0, d);
716 jmpl(a.base(), a.disp(), d);
719 jmpl(a.base(), a.disp(), d);
1583 if (s1_addr.base() == SP) {
1589 if (s2_addr.base() == SP) {
1821 ld_ptr(addr.base(), addr.disp() + 8*8, O0); // Load arg into O0; arg might be in O7 which is about to be crushed
3026 const int base = (instanceKlass::vtable_start_offset() * wordSize +
3036 vtable_offset = regcon_inc_ptr(vtable_offset, base, vtable_offset, sethi_temp);
3391 casn(mark_addr.base(), mark_reg, temp_reg);
3419 casn(mark_addr.base(), mark_reg, temp_reg);
3448 casn(mark_addr.base(), mark_reg, temp_reg);
3550 casx_under_lock(mark_addr.base(), Rmark, Rscratch,
3597 casn(mark_addr.base(), Rmark, Rscratch);
3661 casn(mark_addr.base(), Rmark, Rscratch);
3757 casx_under_lock(mark_addr.base(), Rbox, Rmark,
3861 casn(mark_addr.base(), Rbox, Rscratch);
4523 __ set(addrlit, O1); // O1 := <card table base>
4753 assert(a.base() != d, "not enough registers");
4855 AddressLiteral base(Universe::narrow_oop_base_addr());
4856 load_ptr_contents(base, G6_heapbase);