Lines Matching defs:Rout_high
2299 Register Rout_high, Register Rout_low,
2342 sll(Rin_high, Rcount, Rout_high);
2348 delayed()->or3(Rout_high, Rxfer_bits, Rout_high); // new hi value: or in shifted old hi part and xfer from low
2352 sll(Rin_low, Ralt_count, Rout_high );
2361 Register Rout_high, Register Rout_low,
2373 && Rxfer_bits != Rout_high
2374 && Rout_high != Rin_low,
2403 sra(Rin_high, Rcount, Rout_high ); // high half
2415 sra(Rin_high, 31, Rout_high); // sign into hi
2424 Register Rout_high, Register Rout_low,
2436 && Rxfer_bits != Rout_high
2437 && Rout_high != Rin_low,
2466 srl(Rin_high, Rcount, Rout_high ); // high half
2478 clr(Rout_high);