Lines Matching defs:from
776 * Currently, the result of us stealing a vblank from the irq
1309 * Enable @pipe's PLL so we can start pumping pixels from a plane. Check to
1631 * A pipe without a PLL won't actually be able to drive bits from
1697 * Plane regs are double buffered, going from enabled->disabled needs a
2305 /* FDI needs bits from pipe & plane first */
2665 /* Switch from Rawclk to PCDclk */
2690 /* Switch from PCDclk to Rawclk */
3215 * cpu pipes, hence this is separate from all the other fdi/pch
4559 /* compute bitmask from p1 value */
4736 /* pipesrc controls the size that is scaled from, which should
4940 /* pipesrc and dspsize control the size that is scaled from,
5670 /* compute bitmask from p1 value */
5789 * so pll should not be NULL from above call.
7399 /* i965+ uses the linear or tiled offsets from the
8495 * timestamping. They are derived from true hwmode.
9816 * encoder is active and trying to read from a pipe) and the
9827 * fallout from our resume register restoring. Disable
10215 * prevent the next I915_WRITE from detecting it and printing an error