Lines Matching refs:g7
94 rd %pc, %g7
667 mov WSTATE_USER32, %g7 ;\
698 mov WSTATE_USER64, %g7 ;\
948 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
955 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
992 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
999 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
1046 * g7 = pc we jumped here from (in)
1392 * g7 = pc we jumped here from (in)
1435 or %g2, %g0, %g7
1498 or %g0, %g0, %g7
1528 * %g7 misaligned addr - for alignment traps only
1555 mov %g7, %l3 ! arg2 == misaligned address
1699 sethi %hi(fpu_exists), %g7
1700 ld [%g7 + %lo(fpu_exists)], %g7
1701 brz,pn %g7, .fp_exception_cont
1704 rdpr %tstate, %g7 ! branch if in privileged mode
1705 btst TSTATE_PRIV, %g7
1707 srl %g2, FSR_FTT_SHIFT, %g7 ! extract ftt from %fsr
1708 and %g7, (FSR_FTT>>FSR_FTT_SHIFT), %g7
1709 cmp %g7, FTT_UNFIN
1716 or %g0, 1, %g7
1717 st %g7, [%g1 + CPU_TL1_HDLR] ! set tl1_hdlr flag
1721 set FITOS_INSTR_MASK, %g7
1722 and %g6, %g7, %g7
1724 cmp %g7, %g5
1746 srl %g6, FITOS_RS2_SHIFT, %g7
1747 and %g7, FITOS_REG_MASK, %g7
1749 sllx %g7, 2, %g7
1750 jmp %g4 + %g7
1792 srl %g6, FITOS_RD_SHIFT, %g7
1793 and %g7, FITOS_REG_MASK, %g7
1795 sllx %g7, 2, %g7
1796 jmp %g4 + %g7
1841 set fpustat+FPUSTAT_UNFIN_KSTAT, %g7
1842 ldx [%g7], %g5
1846 casxa [%g7] ASI_N, %g5, %g6
1854 set fpuinfo+FPUINFO_FITOS_KSTAT, %g7
1855 ldx [%g7], %g5
1859 casxa [%g7] ASI_N, %g5, %g6
1896 * Entry: %g7 contains new wstate
1914 wrpr %g0, %g7, %wstate
2108 lduwa [%g5]ASI_USER, %g7 ! get first half of misaligned data
2112 sllx %g7, 32, %g7
2113 or %g5, %g7, %g5 ! combine data
2114 CPU_ADDR(%g7, %g1) ! save data on a per-cpu basis
2115 stx %g5, [%g7 + CPU_TMP1] ! save in cpu_tmp1
2119 LDDF_REG(%g3, %g7, %g4)
2140 sethi %hi(fpu_exists), %g7 ! check fpu_exists
2141 ld [%g7 + %lo(fpu_exists)], %g3
2173 CPU_ADDR(%g7, %g1)
2174 STDF_REG(%g6, %g7, %g4) ! STDF_REG(REG, ADDR, TMP)
2176 ldx [%g7 + CPU_TMP1], %g6
2177 srlx %g6, 32, %g7
2178 stuwa %g7, [%g5]ASI_USER ! first half
2395 GET_TRACE_TICK(%g6, %g7)
2409 CPU_PADDR(%g7, %g6);
2410 add %g7, CPU_TL1_HDLR, %g7
2411 lda [%g7]ASI_MEM, %g6
2414 ldx [%g6 + MMFSA_D_TYPE], %g7 ! XXXQ should be a MMFSA_F_ constant?
2417 or %g6, %g7, %g6
2421 TRACE_NEXT(%g5, %g6, %g7)
2423 CPU_PADDR(%g7, %g6);
2424 add %g7, CPU_TL1_HDLR, %g7 ! %g7 = &cpu_m.tl1_hdlr (PA)
2425 lda [%g7]ASI_MEM, %g6
2428 sta %g0, [%g7]ASI_MEM
2432 rdpr %tpc, %g7
2435 cmp %g7, %g6
2439 cmp %g7, %g6
2442 set fault_rtt_fn1, %g7
2446 rdpr %tpc, %g7
2449 cmp %g7, %g6
2453 cmp %g7, %g6
2457 srl %g7, 5, %g6 ! XXXQ need #define
2464 andn %g7, WTRAP_ALIGN, %g7 /* 128 byte aligned */
2465 add %g7, WTRAP_FAULTOFF, %g7
2471 wrpr %g0, %g7, %tnpc
2474 MMU_FAULT_STATUS_AREA(%g7)
2477 ldx [%g7 + MMFSA_D_ADDR], %g6
2478 ldx [%g7 + MMFSA_D_CTX], %g7
2480 cmp %g7, USER_CONTEXT_TYPE
2482 movgu %icc, USER_CONTEXT_TYPE, %g7
2483 or %g6, %g7, %g6 /* TAG_ACCESS */
2521 * labels here are branched to with "rd %pc, %g7" in the delay slot.
2522 * Return is done by "jmp %g7 + 4".
2547 jmp %g7 + 4
2572 jmp %g7 + 4
2593 jmp %g7 + 4
2611 * g7 = pc we jumped here from (in)
2617 jmp %g7 + 4
2628 * g7 = pc we jumped here from (in)
2665 jmp %g7 + 4
2700 jmp %g7 + 4