Lines Matching refs:g5
493 add %sp, 32, %g5 ;\
494 stxa %l4, [%g5 + %g1]asi_num ;\
495 stxa %l5, [%g5 + %g2]asi_num ;\
496 stxa %l6, [%g5 + %g3]asi_num ;\
497 stxa %l7, [%g5 + %g4]asi_num ;\
498 add %g5, 32, %g5 ;\
499 stxa %i0, [%g5 + %g1]asi_num ;\
500 stxa %i1, [%g5 + %g2]asi_num ;\
501 stxa %i2, [%g5 + %g3]asi_num ;\
502 stxa %i3, [%g5 + %g4]asi_num ;\
503 add %g5, 32, %g5 ;\
504 stxa %i4, [%g5 + %g1]asi_num ;\
505 stxa %i5, [%g5 + %g2]asi_num ;\
506 stxa %i6, [%g5 + %g3]asi_num ;\
507 stxa %i7, [%g5 + %g4]asi_num ;\
565 add %sp, 32, %g5 ;\
566 ldxa [%g5 + %g1]asi_num, %l4 ;\
567 ldxa [%g5 + %g2]asi_num, %l5 ;\
568 ldxa [%g5 + %g3]asi_num, %l6 ;\
569 ldxa [%g5 + %g4]asi_num, %l7 ;\
570 add %g5, 32, %g5 ;\
571 ldxa [%g5 + %g1]asi_num, %i0 ;\
572 ldxa [%g5 + %g2]asi_num, %i1 ;\
573 ldxa [%g5 + %g3]asi_num, %i2 ;\
574 ldxa [%g5 + %g4]asi_num, %i3 ;\
575 add %g5, 32, %g5 ;\
576 ldxa [%g5 + %g1]asi_num, %i4 ;\
577 ldxa [%g5 + %g2]asi_num, %i5 ;\
578 ldxa [%g5 + %g3]asi_num, %i6 ;\
579 ldxa [%g5 + %g4]asi_num, %i7 ;\
681 add %sp, 32, %g5 ;\
682 stxa %l4, [%g5 + %g1]asi_num ;\
683 stxa %l5, [%g5 + %g2]asi_num ;\
684 stxa %l6, [%g5 + %g3]asi_num ;\
685 stxa %l7, [%g5 + %g4]asi_num ;\
686 add %g5, 32, %g5 ;\
687 stxa %i0, [%g5 + %g1]asi_num ;\
688 stxa %i1, [%g5 + %g2]asi_num ;\
689 stxa %i2, [%g5 + %g3]asi_num ;\
690 stxa %i3, [%g5 + %g4]asi_num ;\
691 add %g5, 32, %g5 ;\
692 stxa %i4, [%g5 + %g1]asi_num ;\
693 stxa %i5, [%g5 + %g2]asi_num ;\
694 stxa %i6, [%g5 + %g3]asi_num ;\
695 stxa %i7, [%g5 + %g4]asi_num ;\
953 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5) /* 11 instr */ ;\
997 GET_1ST_TSBE_PTR(%g2, %g1, %g4, %g5) /* 11 instr */ ;\
1044 * g5 = tsbe data (in)
1058 stna %g5, [%g3 + TRAP_ENT_F1]%asi /* tsb data */ ;\
1390 * g5 = tsbe data (in)
1422 ldn [%g1 + P_UTRAPS], %g5 ! are there utraps?
1423 brz,pt %g5, 2f
1425 ldn [%g5 + P_UTRAP15], %g5 ! unaligned utrap?
1426 brz,pn %g5, 2f
1448 ldn [%g1 + P_UTRAPS], %g5 ! are there utraps?
1449 brz,pt %g5, 1f
1451 ldn [%g5 + P_UTRAP16], %g5
1452 brnz,pt %g5, .setup_v9utrap
1458 CPU_INDEX(%g4, %g5)
1459 set cpu_core, %g5
1461 add %g4, %g5, %g4
1462 lduh [%g4 + CPUC_DTRACE_FLAGS], %g5
1463 andcc %g5, CPU_DTRACE_NOFAULT, %g0
1465 or %g5, CPU_DTRACE_BADADDR, %g5
1466 stuh %g5, [%g4 + CPUC_DTRACE_FLAGS]
1485 ldn [%g1 + P_UTRAPS], %g5 ! are there utraps?
1486 brz,a,pt %g5, 2f
1488 ldn [%g5 + P_UTRAP7], %g5 ! fp_disabled utrap?
1489 brz,a,pn %g5, 2f
1514 ldn [%g1 + P_UTRAPS], %g5 ! are there utraps?
1515 brz,a,pt %g5, 1f
1517 ldn [%g5 + P_UTRAP8], %g5
1518 brnz,a,pt %g5, .setup_v9utrap
1527 * %g5 user trap handler
1561 wrpr %g0, %g5, %tnpc ! trap handler address
1571 ldn [%g4 + CPU_THREAD], %g5 ! load thread pointer
1572 ldn [%g5 + T_PROCP], %g5 ! load proc pointer
1573 ldn [%g5 + P_UTRAPS], %g5 ! are there utraps?
1579 brz,pt %g5, 3f ! if p_utraps == NULL goto trap()
1586 brz,a,pt %g5, 3f ! if p_utraps == NULL goto trap()
1604 ldn [%g5 + %g2], %g5
1605 brnz,a,pt %g5, .setup_v9utrap
1615 * %g5 user trap handler
1658 stn %g5, [%g1 + PCB_TRACEPC] ! save trap handler addr in pcb
1667 wrpr %g0, %g5, %tnpc ! trap handler address
1710 set FSR_TEM_NX, %g5
1712 andcc %g2, %g5, %g0
1714 rdpr %tpc, %g5 ! get faulting PC
1718 lda [%g5]ASI_USER, %g6 ! get user's instruction
1723 set FITOS_INSTR, %g5
1724 cmp %g7, %g5
1842 ldx [%g7], %g5
1844 add %g5, 1, %g6
1846 casxa [%g7] ASI_N, %g5, %g6
1847 cmp %g5, %g6
1849 or %g0, %g6, %g5
1855 ldx [%g7], %g5
1857 add %g5, 1, %g6
1859 casxa [%g7] ASI_N, %g5, %g6
1860 cmp %g5, %g6
1862 or %g0, %g6, %g5
1899 sethi %hi(nwin_minus_one), %g5
1900 ld [%g5 + %lo(nwin_minus_one)], %g5 ! %g5 = nwin - 1
1903 movneg %xcc, %g5, %g6 ! if (%g6<0) %g6 = nwin-1
2070 mov %g2, %g5 ! stash sfar
2108 lduwa [%g5]ASI_USER, %g7 ! get first half of misaligned data
2109 add %g5, 4, %g5 ! increment misaligned data address
2110 lduwa [%g5]ASI_USER, %g5 ! get second half of misaligned data
2113 or %g5, %g7, %g5 ! combine data
2115 stx %g5, [%g7 + CPU_TMP1] ! save in cpu_tmp1
2130 mov %g5, %g2 ! misaligned vaddr in %g2
2137 mov %g2, %g5
2178 stuwa %g7, [%g5]ASI_USER ! first half
2179 add %g5, 4, %g5 ! increment misaligned data address
2180 stuwa %g6, [%g5]ASI_USER ! second half
2191 mov %g5, %g2 ! misaligned vaddr in %g2
2394 TRACE_PTR(%g5, %g6)
2396 stxa %g6, [%g5 + TRAP_ENT_TICK]%asi
2397 TRACE_SAVE_TL_GL_REGS(%g5, %g6)
2399 stha %g6, [%g5 + TRAP_ENT_TT]%asi
2401 stxa %g6, [%g5 + TRAP_ENT_TSTATE]%asi
2402 stna %sp, [%g5 + TRAP_ENT_SP]%asi
2403 stna %g0, [%g5 + TRAP_ENT_TR]%asi
2405 stna %g6, [%g5 + TRAP_ENT_TPC]%asi
2408 stna %g6, [%g5 + TRAP_ENT_F1]%asi ! MMU fault address
2412 stna %g6, [%g5 + TRAP_ENT_F2]%asi
2418 stna %g6, [%g5 + TRAP_ENT_F3]%asi ! MMU context/type
2420 stna %g6, [%g5 + TRAP_ENT_F4]%asi
2421 TRACE_NEXT(%g5, %g6, %g7)
2473 rdpr %tt, %g5
2475 cmp %g5, T_ALIGNMENT
2527 GET_TRACE_TICK(%g6, %g5)
2546 TRACE_NEXT(%g3, %g4, %g5)
2552 GET_TRACE_TICK(%g6, %g5)
2571 TRACE_NEXT(%g3, %g4, %g5)
2577 GET_TRACE_TICK(%g6, %g5)
2592 TRACE_NEXT(%g3, %g4, %g5)
2609 * g5 = tsbe data (in)
2614 ! Do not disturb %g5, it will be used after the trace
2627 * g5 - g6 = scratch (clobbered)
2635 TRACE_PTR(%g5, %g6)
2636 stna %g2, [%g5 + TRAP_ENT_SP]%asi ! tag access
2637 stna %g4, [%g5 + TRAP_ENT_F1]%asi ! XXX? tsb tag
2639 stxa %g6, [%g5 + TRAP_ENT_TICK]%asi
2641 stna %g6, [%g5 + TRAP_ENT_F2]%asi
2642 stna %g1, [%g5 + TRAP_ENT_F3]%asi ! tsb8k pointer
2644 stna %g6, [%g5 + TRAP_ENT_TPC]%asi
2645 TRACE_SAVE_TL_GL_REGS(%g5, %g6)
2648 stha %g4, [%g5 + TRAP_ENT_TT]%asi
2656 stxa %g6, [%g5 + TRAP_ENT_TSTATE]%asi ! tag target
2662 stxa %g6, [%g5 + TRAP_ENT_F4]%asi ! context ID
2663 stna %g3, [%g5 + TRAP_ENT_TR]%asi ! tsb4m pointer
2664 TRACE_NEXT(%g5, %g4, %g6)
2699 TRACE_NEXT(%g1, %g4, %g5)
2819 rdpr %tpc, %g5
2821 andncc %g5, %g6, %g0 ! check lower 14 bits of %tpc
2838 rdpr %tnpc, %g5
2839 wrpr %g0, %g5, %tpc
2840 add %g5, 4, %g5
2841 wrpr %g0, %g5, %tnpc