Lines Matching refs:g3
83 * %g2, %g3 args for above
127 rdpr %tt, %g3 ;\
163 mov arg, %g3 ;\
231 rdpr %tt, %g3 ;\
336 mov 12, %g3 ;\
337 sta %l3, [%sp + %g3]asi_num ;\
342 sta %l7, [%g4 + %g3]asi_num ;\
347 sta %i3, [%g4 + %g3]asi_num ;\
352 sta %i7, [%g4 + %g3]asi_num ;\
411 mov 12, %g3 ;\
413 lda [%sp + %g3]asi_num, %l3 ;\
418 lda [%g4 + %g3]asi_num, %l7 ;\
423 lda [%g4 + %g3]asi_num, %i3 ;\
428 lda [%g4 + %g3]asi_num, %i7 ;\
489 mov 16 + V9BIAS64, %g3 ;\
490 stxa %l2, [%sp + %g3]asi_num ;\
496 stxa %l6, [%g5 + %g3]asi_num ;\
501 stxa %i2, [%g5 + %g3]asi_num ;\
506 stxa %i6, [%g5 + %g3]asi_num ;\
561 mov V9BIAS64 + 16, %g3 ;\
562 ldxa [%sp + %g3]asi_num, %l2 ;\
568 ldxa [%g5 + %g3]asi_num, %l6 ;\
573 ldxa [%g5 + %g3]asi_num, %i2 ;\
578 ldxa [%g5 + %g3]asi_num, %i6 ;\
648 mov 12, %g3 ;\
649 sta %l3, [%sp + %g3]asi_num ;\
654 sta %l7, [%g4 + %g3]asi_num ;\
659 sta %i3, [%g4 + %g3]asi_num ;\
664 sta %i7, [%g4 + %g3]asi_num ;\
677 mov 16 + V9BIAS64, %g3 ;\
678 stxa %l2, [%sp + %g3]asi_num ;\
684 stxa %l6, [%g5 + %g3]asi_num ;\
689 stxa %i2, [%g5 + %g3]asi_num ;\
694 stxa %i6, [%g5 + %g3]asi_num ;\
738 rdpr %tt, %g3 ;\
752 or %g0, T_UNIMP_INSTR, %g3 ;\
764 or %g0, T_TAG_OVERFLOW, %g3 ;\
776 or %g0, T_IDIV0, %g3 ;\
787 or %g0, T_SOFTWARE_TRAP, %g3 ;\
847 * synthesize for trap(): SFSR in %g3
850 MMU_FAULT_STATUS_AREA(%g3) ;\
852 ldx [%g3 + MMFSA_I_TYPE], %g1 ;\
853 ldx [%g3 + MMFSA_I_CTX], %g3 ;\
854 sllx %g3, SFSR_CTX_SHIFT, %g3 ;\
855 or %g3, %g1, %g3 ;\
861 * synthesize for trap(): TAG_ACCESS in %g2, SFSR in %g3
868 * synthesize for trap(): SFAR in %g2, SFSR in %g3
871 MMU_FAULT_STATUS_AREA(%g3) ;\
872 ldx [%g3 + MMFSA_D_ADDR], %g2 ;\
875 ldx [%g3 + MMFSA_D_CTX], %g3 ;\
876 sllx %g3, SFSR_CTX_SHIFT, %g3 ;\
878 or %g3, %g1, %g3 ;\
882 * synthesize for trap(): SFAR in %g2, SFSR in %g3
885 MMU_FAULT_STATUS_AREA(%g3) ;\
886 ldx [%g3 + MMFSA_D_ADDR], %g2 ;\
889 ldx [%g3 + MMFSA_D_CTX], %g3 ;\
890 sllx %g3, SFSR_CTX_SHIFT, %g3 ;\
892 or %g3, %g1, %g3 /* SFSR */ ;\
899 * synthesize for trap(): SFAR in %g2, SFSR in %g3
905 * synthesize for trap(): SFAR in %g2, SFSR in %g3
945 GET_MMU_D_PTAGACC_CTXTYPE(%g2, %g3) /* 8 instr */ ;\
946 cmp %g3, INVALID_CONTEXT ;\
989 GET_MMU_I_PTAGACC_CTXTYPE(%g2, %g3) /* 8 instr */ ;\
990 cmp %g3, INVALID_CONTEXT ;\
1019 GET_MMU_D_PTAGACC_CTXTYPE(%g2, %g3) /* 8 instr */ ;\
1022 * g3 = ctx type (0, 1, or 2) ;\
1026 brnz,pt %g3, sfmmu_uprot_trap /* user trap */ ;\
1043 * g3 - g4 = scratch (clobbered)
1054 TRACE_PTR(%g3, %g6) ;\
1056 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi ;\
1057 stna %g2, [%g3 + TRAP_ENT_SP]%asi /* tag access */ ;\
1058 stna %g5, [%g3 + TRAP_ENT_F1]%asi /* tsb data */ ;\
1060 stna %g6, [%g3 + TRAP_ENT_F2]%asi ;\
1061 stna %g1, [%g3 + TRAP_ENT_F3]%asi /* tsb pointer */ ;\
1062 stna %g0, [%g3 + TRAP_ENT_F4]%asi ;\
1064 stna %g6, [%g3 + TRAP_ENT_TPC]%asi ;\
1065 TRACE_SAVE_TL_GL_REGS(%g3, %g6) ;\
1068 stha %g1, [%g3 + TRAP_ENT_TT]%asi ;\
1076 stxa %g1, [%g3 + TRAP_ENT_TSTATE]%asi /* fault addr */ ;\
1083 stna %g1, [%g3 + TRAP_ENT_TR]%asi ;\
1084 TRACE_NEXT(%g3, %g4, %g6)
1389 * g3 - g4 = scratch (clobbered)
1402 ldx [%g4 + MMFSA_I_CTX], %g3 /* g3 = ctx */
1404 cmp %g3, USER_CONTEXT_TYPE
1406 movgu %icc, USER_CONTEXT_TYPE, %g3
1407 or %g2, %g3, %g2 /* TAG_ACCESS */
1408 mov T_INSTR_MMU_MISS, %g3 ! arg2 = traptype
1414 /* %g2 = sfar, %g3 = sfsr */
1470 sllx %g3, 32, %g3
1471 or %g3, %g1, %g3
1532 mov T_FLUSH_PCB, %g3 ! through sys_trap on
1575 cmp %g3, T_SOFTWARE_TRAP
1580 rdpr %tt, %g3 ! delay - get actual hw trap type
1582 sub %g3, 254, %g1 ! UT_TRAP_INSTRUCTION_16 = p_utraps[18]
1589 cmp %g3, T_UNIMP_INSTR
1619 mov T_FLUSH_PCB, %g3 ! through sys_trap on
1888 mov T_FLUSH_PCB, %g3
2069 /* %g2 = sfar, %g3 = sfsr */
2117 srl %g6, 25, %g3 ! %g6 has the instruction
2118 and %g3, 0x1F, %g3 ! %g3 has rd
2119 LDDF_REG(%g3, %g7, %g4)
2128 set T_USER, %g3 ! trap type in %g3
2129 or %g3, T_LDDF_ALIGN, %g3
2136 /* %g2 = sfar, %g3 = sfsr */
2141 ld [%g7 + %lo(fpu_exists)], %g3
2142 brz,a,pn %g3, 4f
2189 set T_USER, %g3 ! trap type in %g3
2190 or %g3, T_STDF_ALIGN, %g3
2199 mov %l0, %g1 ; mov %l1, %g2 ; mov %l2, %g3 ; mov %l4, %g4
2201 mov %g4, %l4 ; mov %g3, %l2 ; mov %g2, %l1 ; mov %g1, %l0
2210 mov %l0, %g1 ; mov %l1, %g2 ; mov %l2, %g3 ; mov %l4, %g4
2212 mov %g4, %l4 ; mov %g3, %l2 ; mov %g2, %l1 ; mov %g1, %l0
2220 rdpr %tstate, %g3 ! get tstate
2221 srlx %g3, PSR_TSTATE_CC_SHIFT, %o0 ! shift ccr to V8 psr
2242 set PSR_ICC, %g3
2243 and %g2, %g3, %g2 ! mask out rest
2245 rdpr %tstate, %g3 ! get tstate
2246 srl %g3, 0, %g3 ! clear upper word
2247 or %g3, %g2, %g3 ! or in new bits
2248 wrpr %g3, %tstate
2286 or %g0, CCR_ICC, %g3
2287 sllx %g3, TSTATE_CCR_SHIFT, %g2
2292 sllx %g2, PSR_TSTATE_CC_SHIFT, %g3 ! shift to tstate.ccr.icc
2293 wrpr %g1, %g3, %tstate ! write tstate
2302 ldn [%g2 + T_LWP], %g3 ! load klwp pointer
2303 ldn [%g3 + LWP_FPU], %g2 ! get lwp_fpu pointer
2526 TRACE_PTR(%g3, %g6)
2528 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2529 TRACE_SAVE_TL_GL_REGS(%g3, %g6)
2531 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2533 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2534 stna %sp, [%g3 + TRAP_ENT_SP]%asi
2536 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2539 stxa %g4, [%g3 + TRAP_ENT_TR]%asi
2541 stxa %g4, [%g3 + TRAP_ENT_F1]%asi
2543 stxa %g4, [%g3 + TRAP_ENT_F2]%asi
2544 stxa %g6, [%g3 + TRAP_ENT_F3]%asi
2545 stna %g0, [%g3 + TRAP_ENT_F4]%asi
2546 TRACE_NEXT(%g3, %g4, %g5)
2551 TRACE_PTR(%g3, %g6)
2553 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2554 TRACE_SAVE_TL_GL_REGS(%g3, %g6)
2556 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2558 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2559 stna %sp, [%g3 + TRAP_ENT_SP]%asi
2561 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2564 stxa %g4, [%g3 + TRAP_ENT_TR]%asi
2566 stxa %g4, [%g3 + TRAP_ENT_F1]%asi
2568 stxa %g4, [%g3 + TRAP_ENT_F2]%asi
2569 stxa %g6, [%g3 + TRAP_ENT_F3]%asi
2570 stna %g0, [%g3 + TRAP_ENT_F4]%asi
2571 TRACE_NEXT(%g3, %g4, %g5)
2576 TRACE_PTR(%g3, %g6)
2578 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2579 TRACE_SAVE_TL_GL_REGS(%g3, %g6)
2581 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2583 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2584 stna %sp, [%g3 + TRAP_ENT_SP]%asi
2586 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2587 stna %g0, [%g3 + TRAP_ENT_TR]%asi
2588 stna %g0, [%g3 + TRAP_ENT_F1]%asi
2589 stna %g0, [%g3 + TRAP_ENT_F2]%asi
2590 stna %g0, [%g3 + TRAP_ENT_F3]%asi
2591 stna %g0, [%g3 + TRAP_ENT_F4]%asi
2592 TRACE_NEXT(%g3, %g4, %g5)
2608 * g3 - g4 = scratch (clobbered)
2625 * g3 = tsb4m pointer (in)
2663 stna %g3, [%g5 + TRAP_ENT_TR]%asi ! tsb4m pointer
2670 * g3 = ctx type (0, 1 or 2) (in) (not used)
2720 * synthesize for trap(): SFAR in %g2, SFSR in %g3
2724 MMU_FAULT_STATUS_AREA(%g3)
2725 ldx [%g3 + MMFSA_D_ADDR], %g2
2728 ldx [%g3 + MMFSA_D_CTX], %g3
2729 sllx %g3, SFSR_CTX_SHIFT, %g3
2732 or %g3, %g1, %g3 /* SFSR */
2737 * synthesize for trap(): SFAR in %g2, SFSR in %g3
2741 MMU_FAULT_STATUS_AREA(%g3)
2742 ldx [%g3 + MMFSA_D_ADDR], %g2
2745 ldx [%g3 + MMFSA_D_CTX], %g3
2746 sllx %g3, SFSR_CTX_SHIFT, %g3
2749 or %g3, %g1, %g3 /* SFSR */
2755 MMU_FAULT_STATUS_AREA(%g3)
2756 ldx [%g3 + MMFSA_D_ADDR], %g2
2757 ldx [%g3 + MMFSA_D_TYPE], %g1
2758 ldx [%g3 + MMFSA_D_CTX], %g4
2761 sllx %g4, SFSR_CTX_SHIFT, %g3
2762 or %g3, %g1, %g3 /* SFSR */
2866 ldn [%g2 + CPU_THREAD], %g3 /* load thread pointer */ ;\
2867 ldn [%g3 + T_PROCP], %g3 /* get proc pointer */ ;\
2868 ldn [%g3 + P_BRAND], %g3 /* get brand pointer */ ;\
2869 brz %g3, 1f /* No brand? No callback. */ ;\
2871 ldn [%g3 + B_MACHOPS], %g3 /* get machops list */ ;\
2872 ldn [%g3 + (callback_id << 3)], %g3 ;\
2873 brz %g3, 1f ;\
2882 * %g3: address of brand handler (where we will jump to) \
2886 jmp %g3 ;\