Lines Matching defs:cfghdl
367 rv = hvldc_intr_getvalid(ssp->cfghdl, iinfo->ino, &intr_state);
384 (void) hvldc_intr_settarget(ssp->cfghdl, iinfo->ino, iinfo->cpuid);
390 (void) hvldc_intr_setvalid(ssp->cfghdl, iinfo->ino,
407 rv = hvldc_intr_setvalid(ssp->cfghdl, iinfo->ino, HV_INTR_NOTVALID);
421 rv = hvldc_intr_getstate(ssp->cfghdl, iinfo->ino, &intr_state);
680 D1("cnex_add_intr: add hdlr, cfghdl=0x%llx, ino=0x%llx, "
681 "cookie=0x%llx\n", cnex_ssp->cfghdl, iinfo->ino, iinfo->icookie);
701 rv = hvldc_intr_setcookie(cnex_ssp->cfghdl, iinfo->ino, iinfo->icookie);
707 rv = hvldc_intr_settarget(cnex_ssp->cfghdl, iinfo->ino, iinfo->cpuid);
713 rv = hvldc_intr_setstate(cnex_ssp->cfghdl, iinfo->ino,
720 rv = hvldc_intr_setvalid(cnex_ssp->cfghdl, iinfo->ino, HV_INTR_VALID);
849 rv = hvldc_intr_setvalid(cnex_ssp->cfghdl,
861 rv = hvldc_intr_getstate(cnex_ssp->cfghdl, iinfo->ino, &istate);
952 rv = hvldc_intr_setstate(cnex_ssp->cfghdl, iinfo->ino,
1046 cnex_ssp->cfghdl = SUN4V_REG_SPEC2CFG_HDL(reg_p->physaddr);
1049 D1("cnex_attach: cfghdl=0x%llx\n", cnex_ssp->cfghdl);
1298 uint64_t cfghdl;
1325 if (md_get_prop_val(mdp, listp[0], "cfg-handle", &cfghdl) != 0) {
1332 " property value = 0x%x\n", chan_id, cfghdl);
1360 if (*cnex_regspec == cfghdl) {