Lines Matching refs:tmp1
802 #define PCACHE_FLUSHALL(tmp1, tmp2, tmp3) \
803 sethi %hi(FLUSH_ADDR), tmp1 ;\
807 flush tmp1 /* See Cheetah PRM 8.10.2 */
815 #define CH_DCACHE_FLUSHALL(arg1, arg2, tmp1) \
816 sub arg1, arg2, tmp1; \
818 stxa %g0, [tmp1]ASI_DC_TAG; \
820 cmp %g0, tmp1; \
822 sub tmp1, arg2, tmp1;
836 #define CH_ICACHE_FLUSHALL(arg1, arg2, tmp1, tmp2) \
838 andn tmp2, DCU_IC, tmp1; \
839 stxa tmp1, [%g0]ASI_DCU; \
885 #define ECACHE_FLUSHALL(arg1, arg2, tmp1, tmp2) \
886 CPU_INDEX(tmp1, tmp2); \
888 sllx tmp1, JP_ECFLUSH_PORTID_SHIFT, tmp1; \
889 or tmp1, tmp2, tmp1; \
894 ldxa [tmp1 + tmp2]ASI_EC_DIAG, %g0; \
900 add tmp1, tmp2, tmp1; \
903 andcc tmp1, tmp2, tmp2; \
961 #define ECACHE_FLUSHALL(arg1, arg2, arg3, tmp1) \
962 GET_CPU_IMPL(tmp1); \
963 cmp tmp1, CHEETAH_IMPL; \
970 CHP_ECACHE_FLUSHALL(arg1, arg2, tmp1); \