Lines Matching refs:g1
1043 * temporarily save the values of %g1 and %g2.
1061 * We save the values of %g1 and %g2 in %tpc, %tnpc and %tstate (since
1063 * we need to put the low-order two bits of %g1 and %g2 in %tstate).
1065 * low-order two bits of %g1 in bits 0-1 and the low-order two bits of
1073 wrpr %g1, %tpc; \
1074 and %g1, 3, %g1; \
1077 or %g1, %g2, %g2; \
1078 sethi %hi(label), %g1; \
1079 jmp %g1+%lo(label); \
1123 * At the end of this macro, %g1 will point to the ch_err_tl1_data
1127 * All %g registers except for %g1, %g2 and %g5 will be available after
1131 * only %g1+%g2 (which we've saved in %tpc, %tnpc, %tstate)
1132 * leaving address in %g1 and updating the %asi register.
1136 * original %g1+%g2 values (because we're going to change %tl).
1139 * 5. Reconstitute %g1+%g2 from %tpc (%g3), %tnpc (%g4),
1151 GET_CH_ERR_TL1_PTR(%g1, %g2, CHPR_TL1_ERR_DATA); \
1152 stxa %g3, [%g1 + CH_ERR_TL1_G3]%asi; \
1153 stxa %g4, [%g1 + CH_ERR_TL1_G4]%asi; \
1154 stxa %g5, [%g1 + CH_ERR_TL1_G5]%asi; \
1155 stxa %g6, [%g1 + CH_ERR_TL1_G6]%asi; \
1156 stxa %g7, [%g1 + CH_ERR_TL1_G7]%asi; \
1166 stxa %g3, [%g1 + CH_ERR_TL1_G1]%asi; \
1171 stxa %g4, [%g1 + CH_ERR_TL1_G2]%asi; \
1172 ldxa [%g1 + CH_ERR_TL1_FLAGS]%asi, %g2; \
1177 9: stxa %g3, [%g1 + CH_ERR_TL1_FLAGS]%asi; \
1180 stxa %g4, [%g1 + CH_ERR_TL1_TPC]%asi; \
1193 ldxa [%g0]ASI_DCU, %g1; \
1194 andn %g1, DCU_DC + DCU_IC, %g2; \
1198 and %g1, DCU_DC + DCU_IC, %g1; \
1199 sllx %g1, CH_ERR_DCU_TO_TSTATE_SHFT, %g1; \
1200 or %g1, %g2, %g2; \
1204 stxa %g5, [%g1 + CH_ERR_TL1_TMP]%asi
1215 * by %g1, last register to restore is %g1 since it's pointing
1227 ldxa [%g1 + CH_ERR_TL1_G7]%asi, %g7; \
1228 ldxa [%g1 + CH_ERR_TL1_G6]%asi, %g6; \
1229 ldxa [%g1 + CH_ERR_TL1_G5]%asi, %g5; \
1230 ldxa [%g1 + CH_ERR_TL1_G4]%asi, %g4; \
1231 ldxa [%g1 + CH_ERR_TL1_G3]%asi, %g3; \
1232 ldxa [%g1 + CH_ERR_TL1_G2]%asi, %g2; \
1233 ldxa [%g1 + CH_ERR_TL1_G1]%asi, %g1; \
1244 label: ldxa [%g1 + CH_ERR_TL1_FLAGS]%asi, %g2; \
1246 stxa %g2, [%g1 + CH_ERR_TL1_FLAGS]%asi; \
1247 set cpu_tl1_err_panic, %g1; \