Lines Matching refs:tmp2
93 #define ECACHE_FLUSHALL(lbl, arg1, arg2, arg3, tmp1, tmp2) \
95 andn tmp1, PSTATE_IE | PSTATE_AM, tmp2 ;\
96 wrpr %g0, tmp2, %pstate ;\
106 #define SF_WORKAROUND(tmp1, tmp2) \
107 sethi %hi(FLUSH_ADDR), tmp2 ;\
110 flush tmp2 ;
112 #define SF_WORKAROUND(tmp1, tmp2)
124 #define VTAG_FLUSHPAGE(lbl, arg1, arg2, tmp1, tmp2, tmp3, tmp4) \
126 andn tmp1, PSTATE_IE | PSTATE_AM, tmp2 ;\
127 wrpr tmp2, 0, %pstate ;\
129 sethi %hi(FLUSH_ADDR), tmp2 ;\
133 flush tmp2 ;\
145 flush tmp2 ;\
149 flush tmp2 ;\
160 #define DTLB_FLUSH_UNLOCKED(lbl, arg1, tmp1, tmp2, tmp3, \
164 SF_WORKAROUND(tmp1, tmp2) ;\
174 ldxa [tmp3]ASI_DTLB_TAGREAD, tmp2 ;\
175 and tmp2, tmp1, tmp6 ;\
176 andn tmp2, tmp1, tmp5 ;\
177 VTAG_FLUSHPAGE(VD, tmp5, tmp6, tmp1, tmp2, tmp3, tmp4) ;\
189 #define ITLB_FLUSH_UNLOCKED(lbl, arg1, tmp1, tmp2, tmp3, \
193 SF_WORKAROUND(tmp1, tmp2) ;\
203 ldxa [tmp3]ASI_ITLB_TAGREAD, tmp2 ;\
204 and tmp2, tmp1, tmp6 ;\
205 andn tmp2, tmp1, tmp5 ;\
206 VTAG_FLUSHPAGE(VI, tmp5, tmp6, tmp1, tmp2, tmp3, tmp4) ;\