Lines Matching refs:tmp1
58 #define ICACHE_FLUSHALL(lbl, arg1, arg2, tmp1) \
59 ldxa [%g0]ASI_LSU, tmp1 ;\
60 btst LSU_IC, tmp1 ;\
62 sub arg1, arg2, tmp1 ;\
64 stxa %g0, [tmp1]ASI_IC_TAG ;\
66 cmp %g0, tmp1 ;\
68 sub tmp1, arg2, tmp1 ;\
75 #define DCACHE_FLUSHALL(lbl, arg1, arg2, tmp1) \
76 ldxa [%g0]ASI_LSU, tmp1 ;\
77 btst LSU_DC, tmp1 ;\
79 sub arg1, arg2, tmp1 ;\
81 stxa %g0, [tmp1]ASI_DC_TAG ;\
83 cmp %g0, tmp1 ;\
85 sub tmp1, arg2, tmp1 ;\
93 #define ECACHE_FLUSHALL(lbl, arg1, arg2, arg3, tmp1, tmp2) \
94 rdpr %pstate, tmp1 ;\
95 andn tmp1, PSTATE_IE | PSTATE_AM, tmp2 ;\
103 wrpr %g0, tmp1, %pstate
106 #define SF_WORKAROUND(tmp1, tmp2) \
108 set MMU_PCONTEXT, tmp1 ;\
109 stxa %g0, [tmp1]ASI_DMMU ;\
112 #define SF_WORKAROUND(tmp1, tmp2)
124 #define VTAG_FLUSHPAGE(lbl, arg1, arg2, tmp1, tmp2, tmp3, tmp4) \
125 rdpr %pstate, tmp1 ;\
126 andn tmp1, PSTATE_IE | PSTATE_AM, tmp2 ;\
151 wrpr %g0, tmp1, %pstate
160 #define DTLB_FLUSH_UNLOCKED(lbl, arg1, tmp1, tmp2, tmp3, \
164 SF_WORKAROUND(tmp1, tmp2) ;\
173 set TAGREAD_CTX_MASK, tmp1 ;\
175 and tmp2, tmp1, tmp6 ;\
176 andn tmp2, tmp1, tmp5 ;\
177 VTAG_FLUSHPAGE(VD, tmp5, tmp6, tmp1, tmp2, tmp3, tmp4) ;\
189 #define ITLB_FLUSH_UNLOCKED(lbl, arg1, tmp1, tmp2, tmp3, \
193 SF_WORKAROUND(tmp1, tmp2) ;\
202 set TAGREAD_CTX_MASK, tmp1 ;\
204 and tmp2, tmp1, tmp6 ;\
205 andn tmp2, tmp1, tmp5 ;\
206 VTAG_FLUSHPAGE(VI, tmp5, tmp6, tmp1, tmp2, tmp3, tmp4) ;\