Lines Matching refs:schizo
2585 case 0x1c: case 0x1d: /* schizo/wci devices */
3719 * swapped, and LPA settings in the processor and schizo
5705 * Get safari portid. All schizo/xmits 0
5761 * Verify if the parent is schizo(xmits)0 and pci B leaf.
7843 drmach_s1p_schizo_t schizo[STARCAT_SLOT1_IO_MAX];
7966 drmach_s1p_pci_free(&slot1->schizo[j].pci[k]);
8019 ASSERT(slot1_paused[exp]->schizo[ioc_unum].csr_basepa == 0x0UL ||
8020 slot1_paused[exp]->schizo[ioc_unum].csr_basepa == schizo_csr_pa);
8023 slot1_paused[exp]->schizo[ioc_unum].csr_basepa = schizo_csr_pa;
8024 pci = &slot1_paused[exp]->schizo[ioc_unum].pci[leaf_unum];
8115 * OBIO and internal schizo interrupts
8177 drmach_s1p_schizo_update(drmach_s1p_schizo_t *schizo, drmach_sr_iter_t iter)
8182 if (schizo->csr_basepa == 0x0UL)
8185 schizo->regs[iter].csr =
8186 lddphysio(schizo->csr_basepa + SCHIZO_CB_CSR_OFFSET);
8187 schizo->regs[iter].errctrl =
8188 lddphysio(schizo->csr_basepa + SCHIZO_CB_ERRCTRL_OFFSET);
8189 schizo->regs[iter].errlog =
8190 lddphysio(schizo->csr_basepa + SCHIZO_CB_ERRLOG_OFFSET);
8193 pci = &schizo->pci[i];
8225 drmach_s1p_schizo_update(&slot1->schizo[j], iter);
8314 drmach_s1p_schizo_log_intr(drmach_s1p_schizo_t *schizo, int exp,
8330 pci = &schizo->pci[i];
8366 "exp=%d, schizo=%d, pci_leaf=%c, "
8393 * Check for logged schizo bus error and pending interrupts.
8400 if (slot1->schizo[j].csr_basepa == 0x0UL)
8403 if (slot1->schizo[j].regs[iter].errlog &
8413 drmach_s1p_schizo_log_intr(&slot1->schizo[j],