Lines Matching defs:exp
118 #define DRMACH_EXPSLOT2BNUM(exp, slot) (((exp) << 1) + (slot))
1457 DRMACH_PR("exp%d: val=%d slice=0x%x\n", i,
1487 DRMACH_PR("exp%d: val=%d slice=0x%x\n", i,
1518 DRMACH_PR("exp%d: val=%d slice=0x%x\n", i,
1612 DRMACH_PR("dr hdr:\n\tid=0x%x vers=0x%x cmd=0x%x exp=0x%x slot=0x%x\n",
2691 int exp, slot;
2697 exp = DRMACH_BNUM2EXP(bnum);
2699 dcd = &gdcd->dcd_slot[exp][slot];
2705 if (gdcd->dcd_slot[exp][slot].l1ss_flags &
3559 uint32_t exp = 0;
3570 if (axq_iopause_enable_all(&exp) != DDI_SUCCESS) {
3571 ASSERT(exp >= 0 && exp < AXQ_MAX_EXP);
3573 cr->earg = (void *)(uintptr_t)exp;
3962 drmach_board_non_panther_cpus(gdcd_t *gdcd, uint_t exp, uint_t slot)
3991 if (gdcd->dcd_prd[exp][port].prd_ptype == SAFPTYPE_CPU &&
3992 RSV_GOOD(gdcd->dcd_prd[exp][port].prd_prsv)) {
3997 impl = (gdcd->dcd_prd[exp][port].prd_ver_reg >> 32)
4016 DRMACH_PR("drmach_board_non_panther_cpus: exp=%d, slot=%d, "
4017 "non_panther_cpus=%d", exp, slot, non_panther_cpus);
4031 uint_t exp, slot;
4072 exp = DRMACH_BNUM2EXP(bp->bnum);
4075 gdcd->dcd_slot[exp][slot].l1ss_cpu_drblock_xwd_offset << 3;
4083 if (gdcd->dcd_slot[exp][slot].l1ss_flags &
4095 if (drmach_board_non_panther_cpus(gdcd, exp, slot) > 0 &&
4173 /* invalidate cached axq info if for same exp */
5392 int exp;
5415 exp = (cpuid >> 5) & 0x1f;
5416 if (drmach_slice_table[exp] & 0x20) {
5418 (drmach_slice_table[exp] & 0x1f);
7861 int portid, exp, slot, i;
7870 exp = (portid >> 5) & 0x1f;
7880 if (cpu[MAKE_CPUID(exp, slot, i)]) {
7980 int portid, exp, ioc_unum, leaf_unum;
8008 exp = portid >> 5;
8016 ASSERT(exp >= 0 && exp < STARCAT_BDSET_MAX);
8017 ASSERT(slot1_paused[exp] != NULL);
8019 ASSERT(slot1_paused[exp]->schizo[ioc_unum].csr_basepa == 0x0UL ||
8020 slot1_paused[exp]->schizo[ioc_unum].csr_basepa == schizo_csr_pa);
8023 slot1_paused[exp]->schizo[ioc_unum].csr_basepa = schizo_csr_pa;
8024 pci = &slot1_paused[exp]->schizo[ioc_unum].pci[leaf_unum];
8276 drmach_s1p_decode_slot_intr(int exp, int unum, drmach_s1p_pci_t *pci,
8304 "interrupt line=%d%s\n", exp, unum, ino, slot_devname, intr_line,
8314 drmach_s1p_schizo_log_intr(drmach_s1p_schizo_t *schizo, int exp,
8321 ASSERT(exp >= 0 && exp < STARCAT_BDSET_MAX);
8340 drmach_s1p_decode_slot_intr(exp, unum,
8347 "ino=0x%x\n", exp, unum, ino);
8354 exp, unum, ino,
8361 "interrupt: ino=0x%x\n", exp,
8366 "exp=%d, schizo=%d, pci_leaf=%c, "
8368 exp, unum, (i == 0) ? 'A' : 'B', ino, reg);
8762 int rv, exp, mcnum, bank;
8772 for (exp = 0; exp < 18; exp++) {
8774 DRMACH_EXPSLOT2BNUM(exp, 0), &id);
8780 memregs = ®s_arr[exp];
8788 exp, mcnum, bank, madr);