Cross Reference: /illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/pcmu

Lines Matching refs:pcb_p
45 	pcmu_cb_t *pcb_p = (pcmu_cb_t *)
47 	mutex_init(&pcb_p->pcb_intr_lock, NULL, MUTEX_DRIVER, NULL);
48 	pcmu_p->pcmu_cb_p = pcb_p;
49 	pcb_p->pcb_pcmu_p = pcmu_p;
56 	pcmu_cb_t *pcb_p = pcmu_p->pcmu_cb_p;
58 	intr_dist_rem(pcmu_cb_intr_dist, pcb_p);
61 	mutex_destroy(&pcb_p->pcb_intr_lock);
62 	kmem_free(pcb_p, sizeof (pcmu_cb_t));
66 pcmu_cb_ino_to_map_pa(pcmu_cb_t *pcb_p, pcmu_ib_ino_t ino)
68 	return (pcb_p->pcb_map_pa + ((ino & 0x1f) << 3));
72 pcmu_cb_ino_to_clr_pa(pcmu_cb_t *pcb_p, pcmu_ib_ino_t ino)
74 	return (pcb_p->pcb_clr_pa + ((ino & 0x1f) << 3));
78 pcmu_cb_set_nintr_reg(pcmu_cb_t *pcb_p, pcmu_ib_ino_t ino, uint64_t value)
80 	uint64_t pa = pcmu_cb_ino_to_clr_pa(pcb_p, ino);
84 		pcb_p->pcb_pcmu_p->pcmu_id, ino, pa);
98 	pcmu_cb_t *pcb_p = pcmu_p->pcmu_cb_p;
100 	pcmu_ib_mondo_t mondo = PCMU_CB_INO_TO_MONDO(pcb_p, ino);
103 	pcmu_ib_t *pib_p = pcb_p->pcb_pcmu_p->pcmu_ib_p;
107 	pa = pcmu_cb_ino_to_map_pa(pcb_p, ino);
109 	mutex_enter(&pcb_p->pcb_intr_lock);
117 	ASSERT(pcb_p->pcb_inos[idx] == 0);
118 	pcb_p->pcb_inos[idx] = ino;
120 	pcmu_cb_set_nintr_reg(pcb_p, ino, PCMU_CLEAR_INTR_REG_IDLE);
121 	mutex_exit(&pcb_p->pcb_intr_lock);
131 pcmu_cb_disable_nintr_reg(pcmu_cb_t *pcb_p, pcmu_ib_ino_t ino, int wait)
133 	uint64_t tmp, map_reg_pa = pcmu_cb_ino_to_map_pa(pcb_p, ino);
134 	ASSERT(MUTEX_HELD(&pcb_p->pcb_intr_lock));
145 		uint64_t state_reg_pa = pcb_p->pcb_obsta_pa;
173 				    pcb_p->pcb_pcmu_p->pcmu_id, map_reg_pa,
174 				    PCMU_CB_INO_TO_MONDO(pcb_p, ino));
182 pcmu_cb_disable_nintr(pcmu_cb_t *pcb_p, pcmu_cb_nintr_index_t idx, int wait)
184 	pcmu_ib_t *pib_p = pcb_p->pcb_pcmu_p->pcmu_ib_p;
186 	pcmu_ib_ino_t ino = pcb_p->pcb_inos[idx];
191 	mutex_enter(&pcb_p->pcb_intr_lock);
192 	pcmu_cb_disable_nintr_reg(pcb_p, ino, wait);
193 	pcmu_cb_set_nintr_reg(pcb_p, ino, PCMU_CLEAR_INTR_REG_PENDING);
194 	pcb_p->pcb_inos[idx] = 0;
195 	mutex_exit(&pcb_p->pcb_intr_lock);
196 	u2u_ittrans_cleanup((u2u_ittrans_data_t *)(pcb_p->pcb_ittrans_cookie),
201 pcmu_cb_clear_nintr(pcmu_cb_t *pcb_p, pcmu_cb_nintr_index_t idx)
203 	pcmu_ib_ino_t ino = pcb_p->pcb_inos[idx];
206 	pcmu_cb_set_nintr_reg(pcb_p, ino, PCMU_CLEAR_INTR_REG_IDLE);
213 	pcmu_cb_t *pcb_p = (pcmu_cb_t *)arg;
215 	mutex_enter(&pcb_p->pcb_intr_lock);
216 	for (i = 0; i < pcb_p->pcb_no_of_inos; i++) {
221 		pcmu_ib_t *pib_p = pcb_p->pcb_pcmu_p->pcmu_ib_p;
224 		pcmu_ib_ino_t ino = pcb_p->pcb_inos[i];
228 		mr_pa = pcmu_cb_ino_to_map_pa(pcb_p, ino);
233 		mondo = PCMU_CB_INO_TO_MONDO(pcb_p, ino);
239 		pcmu_cb_disable_nintr_reg(pcb_p, ino, PCMU_IB_INTR_WAIT);
243 	mutex_exit(&pcb_p->pcb_intr_lock);
247 pcmu_cb_suspend(pcmu_cb_t *pcb_p)
249 	int i, inos = pcb_p->pcb_no_of_inos;
250 	ASSERT(!pcb_p->pcb_imr_save);
251 	pcb_p->pcb_imr_save = kmem_alloc(inos * sizeof (uint64_t), KM_SLEEP);
262 		pcmu_ib_ino_t ino = pcb_p->pcb_inos[i];
265 		pa = pcmu_cb_ino_to_map_pa(pcb_p, ino);
266 		pcb_p->pcb_imr_save[i] = lddphysio(pa);
271 pcmu_cb_resume(pcmu_cb_t *pcb_p)
274 	for (i = 0; i < pcb_p->pcb_no_of_inos; i++) {
276 		pcmu_ib_ino_t ino = pcb_p->pcb_inos[i];
279 		pa = pcmu_cb_ino_to_map_pa(pcb_p, ino);
280 		pcmu_cb_set_nintr_reg(pcb_p, ino, PCMU_CLEAR_INTR_REG_IDLE);
281 		stdphysio(pa, pcb_p->pcb_imr_save[i]);	/* restore IMR */
283 	kmem_free(pcb_p->pcb_imr_save,
284 	    pcb_p->pcb_no_of_inos * sizeof (uint64_t));
285 	pcb_p->pcb_imr_save = NULL;