Lines Matching refs:flt_stat
938 mc_flt_stat_t *flt_stat;
966 flt_stat = mc_aflt->mflt_stat[0];
988 flt_stat->mf_flt_maddr.ma_bd, NULL);
991 flt_stat->mf_flt_paddr, NULL);
993 if (flt_stat->mf_type == FLT_TYPE_INTERMITTENT_CE ||
994 flt_stat->mf_type == FLT_TYPE_PERMANENT_CE) {
1030 flt_stat = mc_aflt->mflt_stat[i];
1031 if (flt_stat->mf_errlog_valid) {
1032 synd[i] = flt_stat->mf_synd;
1033 dslot[i] = flt_stat->mf_dimm_slot;
1034 values[i] = flt_stat->mf_dram_place;
1060 flt_stat = mc_aflt->mflt_stat[i];
1061 bank = flt_stat->mf_flt_maddr.ma_bank;
1063 flt_stat->mf_flt_maddr.ma_phys_bd, bank, flt_stat->mf_type,
1064 flt_stat->mf_dimm_slot);
1070 flt_stat->mf_flt_maddr.ma_bd, bank,
1071 flt_stat->mf_type, flt_stat->mf_dimm_slot);
1085 blen, flt_stat->mf_flt_maddr.ma_phys_bd, bank,
1086 flt_stat->mf_type, flt_stat->mf_dimm_slot);
1534 mc_queue_scf_log(mc_opl_t *mcp, mc_flt_stat_t *flt_stat, int bank)
1546 p->sl_err_add = flt_stat->mf_err_add;
1547 p->sl_err_log = flt_stat->mf_err_log;
1576 mc_scrub_ce(mc_opl_t *mcp, int bank, mc_flt_stat_t *flt_stat, int ptrl_error)
1581 flt_stat->mf_type = FLT_TYPE_PERMANENT_CE;
1589 cntl = do_rewrite(mcp, bank, flt_stat->mf_err_add, 0);
1601 flt_stat->mf_cntl |= MAC_CNTL_PTRL_UE;
1603 flt_stat->mf_cntl |= MAC_CNTL_MI_UE;
1604 flt_stat->mf_type = FLT_TYPE_UE;
1609 flt_stat->mf_cntl |= MAC_CNTL_PTRL_CMPE;
1611 flt_stat->mf_cntl |= MAC_CNTL_MI_CMPE;
1612 flt_stat->mf_type = FLT_TYPE_CMPE;
1617 flt_stat->mf_type = FLT_TYPE_INTERMITTENT_CE;
1620 if (flt_stat->mf_type == FLT_TYPE_PERMANENT_CE) {
1622 if (!(flt_stat->mf_err_log & MAC_ERR_LOG_INVALID)) {
1623 mc_queue_scf_log(mcp, flt_stat, bank);
1659 mc_read_ptrl_reg(mc_opl_t *mcp, int bank, mc_flt_stat_t *flt_stat)
1661 flt_stat->mf_cntl = LD_MAC_REG(MAC_PTRL_CNTL(mcp, bank)) &
1663 flt_stat->mf_err_add = LD_MAC_REG(MAC_PTRL_ERR_ADD(mcp, bank));
1664 flt_stat->mf_err_log = LD_MAC_REG(MAC_PTRL_ERR_LOG(mcp, bank));
1665 flt_stat->mf_flt_maddr.ma_bd = mcp->mc_board_num;
1666 flt_stat->mf_flt_maddr.ma_phys_bd = mcp->mc_phys_board_num;
1667 flt_stat->mf_flt_maddr.ma_bank = bank;
1668 flt_stat->mf_flt_maddr.ma_dimm_addr = flt_stat->mf_err_add;
1672 mc_read_mi_reg(mc_opl_t *mcp, int bank, mc_flt_stat_t *flt_stat)
1682 flt_stat->mf_err_add = LD_MAC_REG(MAC_MI_ERR_ADD(mcp, bank));
1683 flt_stat->mf_err_log = LD_MAC_REG(MAC_MI_ERR_LOG(mcp, bank));
1691 flt_stat->mf_cntl = status;
1692 flt_stat->mf_flt_maddr.ma_bd = mcp->mc_board_num;
1693 flt_stat->mf_flt_maddr.ma_phys_bd = mcp->mc_phys_board_num;
1694 flt_stat->mf_flt_maddr.ma_bank = bank;
1695 flt_stat->mf_flt_maddr.ma_dimm_addr = flt_stat->mf_err_add;
1734 mc_process_error_mir(mc_opl_t *mcp, mc_aflt_t *mc_aflt, mc_flt_stat_t *flt_stat)
1743 flt_stat[0].mf_cntl, flt_stat[1].mf_cntl);
1746 if (((flt_stat[0].mf_cntl | flt_stat[1].mf_cntl) &
1750 if (((flt_stat[0].mf_cntl | flt_stat[1].mf_cntl) &
1760 if (IS_CE_ONLY(flt_stat[i].mf_cntl, ptrl_error)) {
1761 bank = flt_stat[i].mf_flt_maddr.ma_bank;
1763 mc_scrub_ce(mcp, bank, &flt_stat[i], ptrl_error);
1783 if (flt_stat[0].mf_err_add == flt_stat[1].mf_err_add) {
1785 if (IS_CMPE(flt_stat[0].mf_cntl, ptrl_error) ||
1786 IS_CMPE(flt_stat[1].mf_cntl, ptrl_error)) {
1787 flt_stat[0].mf_type = FLT_TYPE_CMPE;
1788 flt_stat[1].mf_type = FLT_TYPE_CMPE;
1791 mc_aflt->mflt_stat[0] = &flt_stat[0];
1792 mc_aflt->mflt_stat[1] = &flt_stat[1];
1803 if (IS_UE(flt_stat[0].mf_cntl, ptrl_error) &&
1804 IS_UE(flt_stat[1].mf_cntl, ptrl_error)) {
1807 MAC_SET_ERRLOG_INFO(&flt_stat[0]);
1808 MAC_SET_ERRLOG_INFO(&flt_stat[1]);
1810 flt_stat[0].mf_type = FLT_TYPE_MUE;
1811 flt_stat[1].mf_type = FLT_TYPE_MUE;
1814 mc_aflt->mflt_stat[0] = &flt_stat[0];
1815 mc_aflt->mflt_stat[1] = &flt_stat[1];
1823 if (IS_UE(flt_stat[i].mf_cntl, ptrl_error)) {
1827 if (IS_OK(flt_stat[i^1].mf_cntl, ptrl_error)) {
1829 flt_stat[i].mf_flt_maddr.ma_bank,
1830 flt_stat[i].mf_flt_maddr.ma_dimm_addr, 0);
1832 flt_stat[i].mf_type = FLT_TYPE_UE;
1833 MAC_SET_ERRLOG_INFO(&flt_stat[i]);
1835 mc_aflt->mflt_stat[0] = &flt_stat[i];
1850 if (IS_CMPE(flt_stat[i].mf_cntl, ptrl_error)) {
1851 flt_stat[i].mf_type = FLT_TYPE_CMPE;
1854 mc_aflt->mflt_stat[0] = &flt_stat[i];
1864 flt_stat[i].mf_cntl = 0;
1872 if (IS_UE(flt_stat[i].mf_cntl, ptrl_error)) {
1874 flt_stat[i].mf_flt_maddr.ma_bank,
1875 flt_stat[i].mf_flt_maddr.ma_dimm_addr,
1877 flt_stat[i].mf_type = FLT_TYPE_UE;
1878 MAC_SET_ERRLOG_INFO(&flt_stat[i]);
1880 mc_aflt->mflt_stat[0] = &flt_stat[i];
1894 mc_flt_stat_t flt_stat[2], mi_flt_stat[2];
1901 bzero(&flt_stat, 2 * sizeof (mc_flt_stat_t));
1908 /* Now read all the registers into flt_stat */
1913 mc_read_ptrl_reg(mcp, bank, &flt_stat[i]);
1922 if (flt_stat[i].mf_cntl & MAC_CNTL_PTRL_ERRS)
1923 rsaddr->mi_restartaddr = flt_stat[i].mf_flt_maddr;
1926 flt_stat[i].mf_cntl, flt_stat[i].mf_err_add,
1927 flt_stat[i].mf_err_log);
1958 if ((((flt_stat[0].mf_cntl & MAC_CNTL_PTRL_ERRS) >>
1961 (flt_stat[0].mf_err_add ==
1963 (((flt_stat[1].mf_cntl & MAC_CNTL_PTRL_ERRS) >>
1966 (flt_stat[1].mf_err_add ==
1976 if ((flt_stat[0].mf_err_add & MAC_ERR_ADD_INVALID) ||
1977 (flt_stat[0].mf_err_log & MAC_ERR_LOG_INVALID))
1978 flt_stat[0].mf_cntl = 0;
1980 if ((flt_stat[1].mf_err_add & MAC_ERR_ADD_INVALID) ||
1981 (flt_stat[1].mf_err_log & MAC_ERR_LOG_INVALID))
1982 flt_stat[1].mf_cntl = 0;
1985 rsaddr->mi_valid = mc_process_error_mir(mcp, &mc_aflt, &flt_stat[0]);
1989 mc_flt_stat_t *flt_stat)
1995 if (IS_UE(flt_stat->mf_cntl, ptrl_error)) {
1997 flt_stat->mf_type = FLT_TYPE_UE;
2000 MAC_SET_ERRLOG_INFO(flt_stat);
2002 } else if (IS_CE(flt_stat->mf_cntl, ptrl_error)) {
2004 MAC_SET_ERRLOG_INFO(flt_stat);
2007 mc_scrub_ce(mcp, bank, flt_stat, ptrl_error);
2012 if (flt_stat->mf_type == FLT_TYPE_INTERMITTENT_CE) {
2015 } else if (flt_stat->mf_type == FLT_TYPE_PERMANENT_CE) {
2018 } else if (flt_stat->mf_type == FLT_TYPE_UE) {
2024 MC_LOG("mc_process_error: fault type %x erpt %s\n", flt_stat->mf_type,
2027 mc_aflt->mflt_stat[0] = flt_stat;
2038 mc_flt_stat_t flt_stat, mi_flt_stat;
2042 bzero(&flt_stat, sizeof (mc_flt_stat_t));
2049 mc_read_ptrl_reg(mcp, bank, &flt_stat);
2052 rsaddr->mi_restartaddr = flt_stat.mf_flt_maddr;
2054 MC_LOG("ptrl registers cntl %x add %x log %x\n", flt_stat.mf_cntl,
2055 flt_stat.mf_err_add, flt_stat.mf_err_log);
2074 if ((((flt_stat.mf_cntl & MAC_CNTL_PTRL_ERRS) >>
2077 (flt_stat.mf_err_add ==
2088 if ((flt_stat.mf_cntl & MAC_CNTL_PTRL_ERRS) &&
2089 ((flt_stat.mf_err_add & MAC_ERR_ADD_INVALID) == 0) &&
2090 ((flt_stat.mf_err_log & MAC_ERR_LOG_INVALID) == 0)) {
2092 &flt_stat);
3889 mc_flt_stat_t flt_stat;
3933 flt_stat.mf_err_add = flt_pag->err_add;
3934 flt_stat.mf_err_log = flt_pag->err_log;
3935 flt_stat.mf_flt_paddr = pa;
3959 mc_queue_scf_log(mcp, &flt_stat, bank);