Lines Matching defs:bit

516 	 *  2. set SCB_INITIALIZED bit in SysCommand registers (SYS_CMD_BASE)
532 * 10. enable PSM Interrupt by writing '1' to PSM_INT_EN bit at
777 * 2. Set the SCB_INIT bit in the System Command register
2109 * Discover the register and bit-offset for LEDs and Reset registers,
2274 /* HSC slotnum (Positional SLotnum) to SCB CFG bit-offset */
2278 * MAP Positional (HSC) slot number to SCB CFG register bit-offset
2394 * and ONLY for the register sets in bit-offset groups 1,2:
2789 * Set OK (green) LED register bit
2796 * Turn off BLINK register bit.
3016 * slot bit-offsets for LED, BLINK, and SYSCFG registers.
3082 * FRU bit-offsets for LED and SYSCFG registers
3140 * FRU bit-offsets for LED and SYSCFG registers
3199 * FRU bit-offsets for LED and SYSCFG registers
3258 * FRU bit-offsets for LED and SYSCFG registers
3318 * FRU bit-offsets for SYSCFG register
3375 * FRU bit-offset for LED register
3428 * FRU bit-offset for SYSCFG register
3472 * FRU bit-offsets for LED and SYSCFG registers
3533 * FRU bit-offsets for LED and SYSCFG registers
3577 * FRU bit-offsets for LED and SYSCFG registers
4041 * Use Slot bit and register offsets,
4449 * We have seen that an interrupt source bit can be set
4450 * even though the corresponding interrupt mask bit
4506 * The INTSRC bit will be cleared by the
4508 * Also, leave the bit set in scb_intr_regs[] so we can
4633 * We are here means that there was some bit set in the interrupt
4667 * counter. Then we check for the scb_fru_offset[] bit in intr_reg.
4675 * offset: bit offset found in INTSRC register
4680 * idx: bit-number of current INTR event bit
4684 * the bit-number of the current event code
4692 while (intr_reg) { /* for each INTSRC bit that's set */
4697 code = (1 << idx); /* back to bit mask */
4704 * Then check for intr_reg bit-offset match
4705 * with bit-offset from table entry.
4722 * bit idx not recognized, check another.
4782 * set the event code bit here in order to
4786 * The INTSRC bit is already cleared,
4814 * then clear the SCTRL_INTR_ALARM_INT bit here.
4991 * bit is ON. If not, this is a regular IO card.
5021 * ERROR: Did not find cause of INTSRC bit
5078 /* idx + 1 because bit 0 is for Slot 1 */
6127 uchar_t reg, bit;
6148 bit = fru_ptr->i2c_info->syscfg_bit;
6156 if (scsb->scsb_data_reg[index] & (1 << bit)) {
6201 * by finding the highest bit number in 32 bit word
6632 * Find out if a bit is set for the FRU type and unit number in the register
6634 * Returns TRUE if bit is set, or FALSE.
6649 /* get the event code based on which we get the reg and bit offsets */
6651 /* get the bit offset in the 8bit register corresponding to the event */
7047 * clears the 'AC card present' bit.
7175 * bit set for non-existing slot, e.g slot 7 on Tonga.
7182 cmn_err(CE_NOTE, "Healthy interrupt bit set for"
7191 cmn_err(CE_NOTE, "Healthy interrupt bit set for"
7308 * For P1.5, set the SCB_INIT bit in the System Command register,