Lines Matching refs:g5

62 	! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
63 ! sfar (g5 == T_ALIGNMENT)
79 cmp %g5, T_ALIGNMENT
90 rdpr %tstate, %g5
91 and %g5, TSTATE_CWP, %g5
93 wrpr %g0, %g5, %cwp
106 FAULT_WINTRACE(%g5, %g6, %g7, TT_F32_SN1)
107 CPU_ADDR(%g5, %g6)
108 ldn [%g5 + CPU_MPCB], %g6
110 ldn [%g6 + MPCB_WBUF], %g5
111 SAVE_V8WINDOW(%g5)
112 mov 1, %g5
113 st %g5, [%g6 + MPCB_WBCNT]
115 set sys_trap, %g5
116 wrpr %g5, %tnpc
122 FAULT_WINTRACE(%g5, %g6, %g1, TT_F32_SO0)
131 CPU_ADDR(%g5, %g6)
132 ldn [%g5 + CPU_MPCB], %g1
158 FAULT_WINTRACE(%g5, %g6, %g7, TT_F32_SO1)
159 CPU_ADDR(%g5, %g6)
163 ldn [%g5 + CPU_MPCB], %g6
164 ld [%g6 + MPCB_WBCNT], %g5
165 add %g5, 1, %g7
170 sll %g5, CPTRSHIFT, %g7 ! spbuf size is sizeof (caddr_t)
173 sll %g5, RWIN32SHIFT, %g7
174 ldn [%g6 + MPCB_WBUF], %g5
175 add %g5, %g7, %g7
178 set sys_trap, %g5
179 wrpr %g5, %tnpc
196 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
197 ! sfar (g5 == T_ALIGNMENT)
212 mov %g5, %g3 ! arg3 = traptype
213 cmp %g5, T_ALIGNMENT
224 rdpr %tstate, %g5
225 and %g5, TSTATE_CWP, %g5
227 wrpr %g0, %g5, %cwp
240 FAULT_WINTRACE(%g5, %g6, %g7, TT_F64_SN1)
241 CPU_ADDR(%g5, %g6)
242 ldn [%g5 + CPU_MPCB], %g6
244 ldn [%g6 + MPCB_WBUF], %g5
245 SAVE_V9WINDOW(%g5)
246 mov 1, %g5
247 st %g5, [%g6 + MPCB_WBCNT]
249 set sys_trap, %g5
250 wrpr %g5, %tnpc
256 FAULT_WINTRACE(%g5, %g6, %g1, TT_F64_SO0)
265 CPU_ADDR(%g5, %g6)
266 ldn [%g5 + CPU_MPCB], %g1
292 FAULT_WINTRACE(%g5, %g6, %g7, TT_F64_SO1)
293 CPU_ADDR(%g5, %g6)
297 ldn [%g5 + CPU_MPCB], %g6
298 ld [%g6 + MPCB_WBCNT], %g5
299 add %g5, 1, %g7
304 sll %g5, CPTRSHIFT, %g7 ! spbuf size is sizeof (caddr_t)
307 sll %g5, RWIN64SHIFT, %g7
308 ldn [%g6 + MPCB_WBUF], %g5
309 add %g5, %g7, %g7
312 set sys_trap, %g5
313 wrpr %g5, %tnpc
337 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
338 ! sfar (g5 == T_ALIGNMENT)
343 cmp %g5, T_ALIGNMENT
354 rdpr %tstate, %g5
355 and %g5, TSTATE_CWP, %g5
357 wrpr %g0, %g5, %cwp
391 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
392 ! sfar (g5 == T_ALIGNMENT)
397 cmp %g5, T_ALIGNMENT
415 sethi %hi(kcontextreg), %g5 ! mov KCONTEXT, %g5
416 ldx [%g5 + %lo(kcontextreg)], %g5
419 xor %g5, %g7, %g7
427 stxa %g5, [%g6]ASI_MMU_CTX
428 sethi %hi(FLUSH_ADDR), %g5
429 flush %g5