Lines Matching refs:g7
93 rd %pc, %g7
787 mov WSTATE_USER32, %g7 ;\
818 mov WSTATE_USER64, %g7 ;\
1084 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
1086 cmp %g4, %g7 ;\
1119 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
1123 cmp %g4, %g7 ;\
1175 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
1177 cmp %g4, %g7 ;\
1212 srlx %g2, TAG_VALO_SHIFT, %g7 /* g7 = tsb tag */ ;\
1216 cmp %g4, %g7 ;\
1287 * g7 = pc we jumped here from (in)
1631 or %g2, %g0, %g7
1725 or %g0, %g0, %g7
1755 * %g7 misaligned addr - for alignment traps only
1782 mov %g7, %l3 ! arg2 == misaligned address
1926 sethi %hi(fpu_exists), %g7
1927 ld [%g7 + %lo(fpu_exists)], %g7
1928 brz,pn %g7, .fp_exception_cont
1931 rdpr %tstate, %g7 ! branch if in privileged mode
1932 btst TSTATE_PRIV, %g7
1934 srl %g2, FSR_FTT_SHIFT, %g7 ! extract ftt from %fsr
1935 and %g7, (FSR_FTT>>FSR_FTT_SHIFT), %g7
1936 cmp %g7, FTT_UNFIN
1943 or %g0, 1, %g7
1944 st %g7, [%g1 + CPU_TL1_HDLR] ! set tl1_hdlr flag
1948 set FITOS_INSTR_MASK, %g7
1949 and %g6, %g7, %g7
1951 cmp %g7, %g5
1973 srl %g6, FITOS_RS2_SHIFT, %g7
1974 and %g7, FITOS_REG_MASK, %g7
1976 sllx %g7, 2, %g7
1977 jmp %g4 + %g7
2019 srl %g6, FITOS_RD_SHIFT, %g7
2020 and %g7, FITOS_REG_MASK, %g7
2022 sllx %g7, 2, %g7
2023 jmp %g4 + %g7
2068 set fpustat+FPUSTAT_UNFIN_KSTAT, %g7
2069 ldx [%g7], %g5
2073 casxa [%g7] ASI_N, %g5, %g6
2081 set fpuinfo+FPUINFO_FITOS_KSTAT, %g7
2082 ldx [%g7], %g5
2086 casxa [%g7] ASI_N, %g5, %g6
2128 * Entry: %g7 contains new wstate
2146 wrpr %g0, %g7, %wstate
2343 lduwa [%g5]ASI_USER, %g7 ! get first half of misaligned data
2347 sllx %g7, 32, %g7
2348 or %g5, %g7, %g5 ! combine data
2349 CPU_ADDR(%g7, %g1) ! save data on a per-cpu basis
2350 stx %g5, [%g7 + CPU_TMP1] ! save in cpu_tmp1
2354 LDDF_REG(%g3, %g7, %g4)
2377 sethi %hi(fpu_exists), %g7 ! check fpu_exists
2378 ld [%g7 + %lo(fpu_exists)], %g3
2410 CPU_ADDR(%g7, %g1)
2411 STDF_REG(%g6, %g7, %g4) ! STDF_REG(REG, ADDR, TMP)
2413 ldx [%g7 + CPU_TMP1], %g6
2414 srlx %g6, 32, %g7
2415 stuwa %g7, [%g5]ASI_USER ! first half
2637 GET_TRACE_TICK(%g6, %g7)
2652 CPU_PADDR(%g7, %g6);
2653 add %g7, CPU_TL1_HDLR, %g7
2654 lda [%g7]ASI_MEM, %g6
2659 TRACE_NEXT(%g5, %g6, %g7)
2686 CPU_PADDR(%g7, %g6);
2687 add %g7, CPU_TL1_HDLR, %g7 ! %g7 = &cpu_m.tl1_hdlr (PA)
2691 lda [%g7]ASI_MEM, %g6
2704 stxa %g0, [%g7]ASI_DC_INVAL
2716 sta %g0, [%g7]ASI_MEM
2721 rdpr %tl, %g7
2722 sub %g7, 1, %g6
2725 wrpr %g7, %tl
2730 rdpr %tpc, %g7
2733 cmp %g7, %g6
2737 cmp %g7, %g6
2744 andn %g7, WTRAP_ALIGN, %g7 /* 128 byte aligned */
2745 add %g7, WTRAP_FAULTOFF, %g7
2746 wrpr %g0, %g7, %tnpc
2815 * labels here are branched to with "rd %pc, %g7" in the delay slot.
2816 * Return is done by "jmp %g7 + 4".
2833 jmp %g7 + 4
2851 * g7 = pc we jumped here from (in)
2857 jmp %g7 + 4
2868 * g7 = pc we jumped here from (in)
2899 jmp %g7 + 4
2928 jmp %g7 + 4