Lines Matching refs:g3
82 * %g2, %g3 args for above
126 rdpr %tt, %g3 ;\
158 mov arg, %g3 ;\
200 mov T_FLUSHW, %g3 ;\
238 rdpr %tt, %g3 ;\
343 mov 12, %g3 ;\
344 sta %l3, [%sp + %g3]asi_num ;\
349 sta %l7, [%g4 + %g3]asi_num ;\
354 sta %i3, [%g4 + %g3]asi_num ;\
359 sta %i7, [%g4 + %g3]asi_num ;\
447 mov 12, %g3 ;\
449 lda [%sp + %g3]asi_num, %l3 ;\
454 lda [%g4 + %g3]asi_num, %l7 ;\
459 lda [%g4 + %g3]asi_num, %i3 ;\
464 lda [%g4 + %g3]asi_num, %i7 ;\
546 mov 16 + V9BIAS64, %g3 ;\
547 stxa %l2, [%sp + %g3]asi_num ;\
553 stxa %l6, [%g5 + %g3]asi_num ;\
558 stxa %i2, [%g5 + %g3]asi_num ;\
563 stxa %i6, [%g5 + %g3]asi_num ;\
646 mov V9BIAS64 + 16, %g3 ;\
647 ldxa [%sp + %g3]asi_num, %l2 ;\
653 ldxa [%g5 + %g3]asi_num, %l6 ;\
658 ldxa [%g5 + %g3]asi_num, %i2 ;\
663 ldxa [%g5 + %g3]asi_num, %i6 ;\
768 mov 12, %g3 ;\
769 sta %l3, [%sp + %g3]asi_num ;\
774 sta %l7, [%g4 + %g3]asi_num ;\
779 sta %i3, [%g4 + %g3]asi_num ;\
784 sta %i7, [%g4 + %g3]asi_num ;\
797 mov 16 + V9BIAS64, %g3 ;\
798 stxa %l2, [%sp + %g3]asi_num ;\
804 stxa %l6, [%g5 + %g3]asi_num ;\
809 stxa %i2, [%g5 + %g3]asi_num ;\
814 stxa %i6, [%g5 + %g3]asi_num ;\
883 or %g0, T_UNIMP_INSTR, %g3 ;\
895 or %g0, T_TAG_OVERFLOW, %g3 ;\
907 or %g0, T_IDIV0, %g3 ;\
918 or %g0, T_SOFTWARE_TRAP, %g3 ;\
967 ldxa [MMU_SFSR]%asi, %g3 ;\
976 ldxa [MMU_SFSR]%asi, %g3 ;\
985 ldxa [MMU_SFSR]%asi, %g3 ;\
992 ldxa [MMU_SFSR]%asi, %g3 ;\
1004 ldxa [MMU_SFSR]%asi, %g3 ;\
1013 ldxa [MMU_SFSR]%asi, %g3 ;\
1024 * g3 = ctx number
1035 and %g2, %g4, %g3 /* g3 = ctx */ ;\
1038 cmp %g3, %g6 ;\
1044 cmp %g3, %g6 ;\
1078 sllx %g2, TAGACC_CTX_LSHIFT, %g3 ;\
1079 srlx %g3, TAGACC_CTX_LSHIFT, %g3 /* g3 = ctx */ ;\
1080 cmp %g3, INVALID_CONTEXT ;\
1115 sllx %g2, TAGACC_CTX_LSHIFT, %g3 ;\
1116 srlx %g3, TAGACC_CTX_LSHIFT, %g3 /* g3 = ctx */ ;\
1117 cmp %g3, INVALID_CONTEXT ;\
1125 mov -1, %g3 /* set 4M tsbe ptr to -1 */ ;\
1171 sllx %g2, TAGACC_CTX_LSHIFT, %g3 ;\
1172 srlx %g3, TAGACC_CTX_LSHIFT, %g3 /* g3 = ctx */ ;\
1173 cmp %g3, INVALID_CONTEXT ;\
1208 sllx %g2, TAGACC_CTX_LSHIFT, %g3 ;\
1209 srlx %g3, TAGACC_CTX_LSHIFT, %g3 /* g3 = ctx */ ;\
1210 cmp %g3, INVALID_CONTEXT ;\
1218 mov -1, %g3 /* set 4M TSB ptr to -1 */ ;\
1252 * g3 = ctx number ;\
1258 brnz,pt %g3, sfmmu_uprot_trap /* user trap */ ;\
1284 * g3 - g4 = scratch (clobbered)
1295 TRACE_PTR(%g3, %g6) ;\
1297 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi ;\
1298 stxa %g2, [%g3 + TRAP_ENT_SP]%asi /* tag access */ ;\
1299 stxa %g5, [%g3 + TRAP_ENT_F1]%asi /* tsb data */ ;\
1301 stxa %g6, [%g3 + TRAP_ENT_F2]%asi ;\
1302 stxa %g1, [%g3 + TRAP_ENT_F3]%asi /* tsb pointer */ ;\
1303 stxa %g0, [%g3 + TRAP_ENT_F4]%asi ;\
1305 stxa %g6, [%g3 + TRAP_ENT_TPC]%asi ;\
1307 stha %g6, [%g3 + TRAP_ENT_TL]%asi ;\
1310 stha %g6, [%g3 + TRAP_ENT_TT]%asi ;\
1315 stxa %g1, [%g3 + TRAP_ENT_TSTATE]%asi /* tsb tag */ ;\
1316 stxa %g0, [%g3 + TRAP_ENT_TR]%asi ;\
1317 TRACE_NEXT(%g3, %g4, %g6)
1596 * g3 - g4 = scratch (clobbered)
1605 mov T_INSTR_MMU_MISS, %g3 ! arg2 = traptype
1671 andcc %g3, %g4, %g0 ! bit for something else which
1686 sllx %g3, 32, %g3
1687 or %g3, %g1, %g3
1759 mov T_FLUSH_PCB, %g3 ! through sys_trap on
1802 cmp %g3, T_SOFTWARE_TRAP
1807 rdpr %tt, %g3 ! delay - get actual hw trap type
1809 sub %g3, 254, %g1 ! UT_TRAP_INSTRUCTION_16 = p_utraps[18]
1816 cmp %g3, T_UNIMP_INSTR
1846 mov T_FLUSH_PCB, %g3 ! through sys_trap on
2108 mov T_FLUSH_PCB, %g3
2352 srl %g6, 25, %g3 ! %g6 has the instruction
2353 and %g3, 0x1F, %g3 ! %g3 has rd
2354 LDDF_REG(%g3, %g7, %g4)
2363 set T_USER, %g3 ! trap type in %g3
2364 or %g3, T_LDDF_ALIGN, %g3
2378 ld [%g7 + %lo(fpu_exists)], %g3
2379 brz,a,pn %g3, 4f
2426 set T_USER, %g3 ! trap type in %g3
2427 or %g3, T_STDF_ALIGN, %g3
2436 mov %l0, %g1 ; mov %l1, %g2 ; mov %l2, %g3 ; mov %l4, %g4
2438 mov %g4, %l4 ; mov %g3, %l2 ; mov %g2, %l1 ; mov %g1, %l0
2447 mov %l0, %g1 ; mov %l1, %g2 ; mov %l2, %g3 ; mov %l4, %g4
2449 mov %g4, %l4 ; mov %g3, %l2 ; mov %g2, %l1 ; mov %g1, %l0
2458 rdpr %tstate, %g3 ! get tstate
2459 srlx %g3, PSR_TSTATE_CC_SHIFT, %o0 ! shift ccr to V8 psr
2480 set PSR_ICC, %g3
2481 and %g2, %g3, %g2 ! mask out rest
2483 rdpr %tstate, %g3 ! get tstate
2484 srl %g3, 0, %g3 ! clear upper word
2485 or %g3, %g2, %g3 ! or in new bits
2486 wrpr %g3, %tstate
2525 or %g0, CCR_ICC, %g3
2526 sllx %g3, TSTATE_CCR_SHIFT, %g2
2531 sllx %g2, PSR_TSTATE_CC_SHIFT, %g3 ! shift to tstate.ccr.icc
2532 wrpr %g1, %g3, %tstate ! write tstate
2541 ldn [%g2 + T_LWP], %g3 ! load klwp pointer
2542 ldn [%g3 + LWP_FPU], %g2 ! get lwp_fpu pointer
2681 mov %g5, %g3
2789 srlx %g1, CTXREG_NEXT_SHIFT, %g3
2790 brz,pt %g3, 3f ! nucleus pgsz is 0, no problem
2791 sllx %g3, CTXREG_NEXT_SHIFT, %g3
2795 clr %g3 ! kernel: PCONTEXT=0
2796 xor %g3, %g1, %g3 ! user: clr N_pgsz0/1 bits
2802 stxa %g3, [%g1]ASI_DMMU
2820 TRACE_PTR(%g3, %g6)
2822 stxa %g6, [%g3 + TRAP_ENT_TICK]%asi
2824 stha %g6, [%g3 + TRAP_ENT_TL]%asi
2826 stha %g6, [%g3 + TRAP_ENT_TT]%asi
2828 stxa %g6, [%g3 + TRAP_ENT_TSTATE]%asi
2829 stna %sp, [%g3 + TRAP_ENT_SP]%asi
2831 stna %g6, [%g3 + TRAP_ENT_TPC]%asi
2832 TRACE_NEXT(%g3, %g4, %g5)
2848 * g3 - g4 = scratch (clobbered)
2865 * g3 = tsb4m pointer (in)
2897 stxa %g3, [%g5 + TRAP_ENT_TR]%asi ! tsb4m pointer
2904 * g3 = ctx number (in)
3034 ldn [%g2 + CPU_THREAD], %g3 /* load thread pointer */ ;\
3035 ldn [%g3 + T_PROCP], %g3 /* get proc pointer */ ;\
3036 ldn [%g3 + P_BRAND], %g3 /* get brand pointer */ ;\
3037 brz %g3, 1f /* No brand? No callback. */ ;\
3039 ldn [%g3 + B_MACHOPS], %g3 /* get machops list */ ;\
3040 ldn [%g3 + (callback_id << 3)], %g3 ;\
3041 brz %g3, 1f ;\
3050 * %g3: address of brand handler (where we will jump to) \
3054 jmp %g3 ;\