Lines Matching defs:pbm_ctl_stat
2009 pbm_err_p->pbm_ctl_stat, pbm_err_p->pbm_afsr);
2012 !(pbm_err_p->pbm_ctl_stat & XMITS_PCI_CTRL_X_MODE))
2242 uint64_t pbm_ctl_stat, pbm_afsr, pbm_pcix_stat;
2249 pbm_ctl_stat = *pbm_p->pbm_ctrl_reg;
2255 (pbm_ctl_stat & (SCHIZO_PCI_CTRL_BUS_UNUSABLE |
2266 (pbm_ctl_stat & XMITS_PCI_CTRL_X_MODE)) {
2412 if ((pbm_err.pbm_ctl_stat & pci_pbm_err_tbl[i].pbm_reg_bit) &&
2430 if ((pbm_err.pbm_ctl_stat & COMMON_PCI_CTRL_SBH_ERR) &&
2445 if (pbm_err.pbm_ctl_stat & COMMON_PCI_CTRL_SERR) {
2469 if (pbm_err.pbm_ctl_stat & TOMATILLO_PCI_CTRL_PCI_DTO_ERR) {
2513 if (pbm_err.pbm_ctl_stat & SCHIZO_PCI_CTRL_PCI_MMU_ERR) {
2592 pbm_err_p->pbm_ctl_stat = *pbm_p->pbm_ctrl_reg;
2606 pbm_err_p->pbm_err_sl = (pbm_err_p->pbm_ctl_stat &
2618 if (pbm_err_p->pbm_ctl_stat & XMITS_PCI_CTRL_DMA_WR_PERR) {
2627 pbm_err_p->pbm_ctl_stat &
2630 pbm_err_p->pbm_ctl_stat = *pbm_p->pbm_ctrl_reg;
2648 (pbm_err_p->pbm_ctl_stat & XMITS_PCI_CTRL_X_MODE)) {
2677 *pbm_p->pbm_ctrl_reg = pbm_err_p->pbm_ctl_stat;
2685 uint64_t pbm_afsr, pbm_ctl_stat;
2693 pbm_ctl_stat = *pbm_p->pbm_ctrl_reg;
2697 (pbm_ctl_stat & COMMON_PCI_CTRL_SERR)) {
2698 pbm_ctl_stat = *pbm_p->pbm_ctrl_reg;
2886 PCI_PBM_CSR, DATA_TYPE_UINT64, pbm_err->pbm_ctl_stat,
2915 PCI_PBM_CSR, DATA_TYPE_UINT64, pbm_err->pbm_ctl_stat,