Cross Reference: /illumos-gate/usr/src/uts/sun4u/io/pci/pcipsy.c

Lines Matching refs:pbm_p
233 	pbm_t *pbm_p = pci_p->pci_pbm_p;
277 	if (i = pbm_register_intr(pbm_p)) {
282 	intr_dist_add(pbm_intr_dist, pbm_p);
475 pci_pbm_intr_dist(pbm_t *pbm_p)
799 pbm_configure(pbm_t *pbm_p)
801 	pci_t *pci_p = pbm_p->pbm_pci_p;
889 	*pbm_p->pbm_async_flt_status_reg = l;
898 	pbm_p->pbm_config_header->ch_status_reg = s;
900 		pbm_p->pbm_config_header->ch_status_reg);
902 	l = *pbm_p->pbm_ctrl_reg;	/* save control register state */
916 		pbm_p->pbm_speed = PBM_SPEED_66MHZ;
918 		pbm_p->pbm_speed = PBM_SPEED_33MHZ;
920 	    pbm_p->pbm_speed  == PBM_SPEED_66MHZ ? 66 : 33);
981 	l |= (uint64_t)STARFIRE_UPAID2HWIGN(pbm_p->pbm_pci_p->pci_id)
989 	*pbm_p->pbm_ctrl_reg = l;
995 	l = *pbm_p->pbm_diag_reg;
1010 	*pbm_p->pbm_diag_reg = l;
1018 	pbm_p->pbm_config_header->ch_command_reg = s;
1020 		pbm_p->pbm_config_header->ch_command_reg);
1033 		pbm_p->pbm_config_header->ch_latency_timer_reg =
1038 		(int)pbm_p->pbm_config_header->ch_latency_timer_reg);
1042 pbm_disable_pci_errors(pbm_t *pbm_p)
1044 	pci_t *pci_p = pbm_p->pbm_pci_p;
1051 	*pbm_p->pbm_ctrl_reg &=
1070 pci_pbm_dma_sync(pbm_t *pbm_p, ib_ino_t ino)
1072 	uint64_t pa = pbm_p->pbm_sync_reg_pa;
1258 pci_pbm_setup(pbm_t *pbm_p)
1260 	pci_t *pci_p = pbm_p->pbm_pci_p;
1271 	pbm_p->pbm_config_header =
1278 	pbm_p->pbm_ctrl_reg = (uint64_t *)(a + PSYCHO_PCI_CTRL_REG_OFFSET);
1279 	pbm_p->pbm_diag_reg = (uint64_t *)(a + PSYCHO_PCI_DIAG_REG_OFFSET);
1280 	pbm_p->pbm_async_flt_status_reg =
1282 	pbm_p->pbm_async_flt_addr_reg =
1286 		pbm_p->pbm_sync_reg_pa =
1292 pci_pbm_teardown(pbm_t *pbm_p)
1709 	pbm_t *pbm_p = pci_p->pci_pbm_p;
1711 	ASSERT(MUTEX_HELD(&pbm_p->pbm_pci_p->pci_common_p->pci_fm_mutex));
1713 	*pbm_p->pbm_ctrl_reg = pbm_err_p->pbm_ctl_stat;
1714 	*pbm_p->pbm_async_flt_status_reg = pbm_err_p->pbm_afsr;
1715 	pbm_p->pbm_config_header->ch_status_reg =
1731 	pbm_t *pbm_p = pci_p->pci_pbm_p;
1763 			ndi_fm_acc_err_set(pbm_p->pbm_excl_handle, derr);
1874 	pbm_t *pbm_p = pci_p->pci_pbm_p;
1880 	pci_cfg_stat = pbm_p->pbm_config_header->ch_status_reg;
1881 	pbm_ctl_stat = *pbm_p->pbm_ctrl_reg;
1882 	pbm_afsr = *pbm_p->pbm_async_flt_status_reg;
1904 	pbm_t *pbm_p = pci_p->pci_pbm_p;
1914 		pbm_p->pbm_config_header->ch_status_reg;
1915 	pbm_err_p->pbm_ctl_stat = *pbm_p->pbm_ctrl_reg;
1917 		pbm_p->pbm_config_header->ch_command_reg;
1918 	pbm_err_p->pbm_afsr = *pbm_p->pbm_async_flt_status_reg;
1919 	pbm_err_p->pbm_afar = *pbm_p->pbm_async_flt_addr_reg;
1920 	pbm_err_p->pbm_pci.pci_pa = *pbm_p->pbm_async_flt_addr_reg;
1924 pbm_clear_error(pbm_t *pbm_p)
1934 	pbm_ctl_stat = *pbm_p->pbm_ctrl_reg;
1935 	pbm_afsr = *pbm_p->pbm_async_flt_status_reg;
1939 		pbm_ctl_stat = *pbm_p->pbm_ctrl_reg;
1940 		pbm_afsr = *pbm_p->pbm_async_flt_status_reg;