Lines Matching defs:line
941 uint64_t base, size, line, remainder;
951 * a cache line.
970 * Compute the line within the half-dimm. This is the same as the line
972 * 144 bits (18 bytes) to a cache line.
974 line = off / QWORD_SIZE_BYTES;
979 * Compute the line within the segment.
988 line = (line * ifactor) + bank->lm;
992 * in a cache line.
994 *addr = (line << 6) + seg->base;
1007 uint64_t base, size, line, remainder;
1011 * Compute the line within the segment assuming that there are 64 data
1012 * bytes in a cache line.
1014 line = (addr - seg->base) / 64;
1023 * can be used to compute the line within this bank. This is the same as
1024 * the line within the half-dimm. This is because each DIMM in a bank
1025 * contributes uniformly to every cache line.
1028 line = (line - bank->lm)/ifactor;
1034 *off = line * QWORD_SIZE_BYTES;
1043 * a cache line.
1048 * Compute the offset within the dimm to the nearest line. This depends
1061 * A cache line is composed of four quadwords with the associated ECC, the
1073 * dimm table: each bit at a cache line needs two bits to present one of
1077 * pin table: each bit at a cache line needs one byte to present pin position,
1079 * the same as bit position at a cache line, i.e. pin_table[0] presents