Lines Matching refs:smbus
48 #include <sys/i2c/nexus/smbus.h>
53 static uint_t smbus_intr_cmn(smbus_t *smbus, char *src);
64 static void smbus_free_regs(smbus_t *smbus);
65 static int smbus_setup_regs(dev_info_t *dip, smbus_t *smbus);
69 static int smbus_rd(smbus_t *smbus);
70 static int smbus_wr(smbus_t *smbus);
71 static void smbus_put(smbus_t *smbus, uint8_t reg, uint8_t data, uint8_t flags);
72 static uint8_t smbus_get(smbus_t *smbus, uint8_t reg);
75 static int smbus_switch(smbus_t *smbus);
253 smbus_interrupts_on(smbus_t *smbus)
257 src_enable = ddi_get32(smbus->smbus_confighandle,
258 (uint32_t *)&smbus->smbus_configregaddr[SMBUS_SRC_ENA]);
260 ddi_put32(smbus->smbus_confighandle,
261 (uint32_t *)&smbus->smbus_configregaddr[SMBUS_SRC_ENA],
263 (void) ddi_get32(smbus->smbus_confighandle,
264 (uint32_t *)&smbus->smbus_configregaddr[SMBUS_SRC_ENA]);
268 smbus_interrupts_off(smbus_t *smbus)
272 src_enable = ddi_get32(smbus->smbus_confighandle,
273 (uint32_t *)&smbus->smbus_configregaddr[SMBUS_SRC_ENA]);
275 ddi_put32(smbus->smbus_confighandle,
276 (uint32_t *)&smbus->smbus_configregaddr[SMBUS_SRC_ENA],
278 (void) ddi_get32(smbus->smbus_confighandle,
279 (uint32_t *)&smbus->smbus_configregaddr[SMBUS_SRC_ENA]);
285 smbus_t *smbus;
288 smbus = ddi_get_soft_state(smbus_state, instance);
290 if (smbus == NULL) {
295 cv_destroy(&smbus->smbus_cv);
296 mutex_destroy(&smbus->smbus_mutex);
298 if ((smbus->smbus_attachflags & INTERRUPT_PRI) != 0) {
303 smbus_free_regs(smbus);
305 if ((smbus->smbus_attachflags & NEXUS_REGISTER) != 0) {
308 if ((smbus->smbus_attachflags & IMUTEX) != 0) {
309 mutex_destroy(&smbus->smbus_imutex);
310 cv_destroy(&smbus->smbus_icv);
313 if (smbus->smbus_timeout != 0) {
314 (void) untimeout(smbus->smbus_timeout);
317 if ((smbus->smbus_attachflags & ADD_INTR) != 0) {
318 ddi_remove_intr(dip, 0, smbus->smbus_icookie);
327 smbus_t *smbus;
338 smbus = ddi_get_soft_state(smbus_state, instance);
340 (void) snprintf(smbus->smbus_name, sizeof (smbus->smbus_name),
343 smbus->smbus_dip = dip;
345 mutex_init(&smbus->smbus_mutex, NULL, MUTEX_DRIVER, NULL);
346 mutex_init(&smbus->smbus_imutex, NULL, MUTEX_DRIVER, NULL);
347 cv_init(&smbus->smbus_cv, NULL, CV_DRIVER, NULL);
348 cv_init(&smbus->smbus_intr_cv, NULL, CV_DRIVER, NULL);
350 if (smbus_setup_regs(dip, smbus) != DDI_SUCCESS) {
356 smbus->smbus_polling = 0;
370 smbus->smbus_attachflags |= INTERRUPT_PRI;
376 smbus_put(smbus, SMB_STS, 0xff, SMBUS_FLUSH);
378 if (ddi_get_iblock_cookie(dip, 0, &smbus->smbus_icookie) !=
384 (caddr_t)smbus) != DDI_SUCCESS) {
386 smbus->smbus_name);
389 smbus->smbus_attachflags |= ADD_INTR;
391 smbus->smbus_polling = 1;
393 smbus_put(smbus, SMB_STS, 0xff, SMBUS_FLUSH);
399 cv_init(&smbus->smbus_icv, NULL, CV_DRIVER, NULL);
400 mutex_init(&smbus->smbus_imutex, NULL, MUTEX_DRIVER,
401 (void *)smbus->smbus_icookie);
402 smbus->smbus_attachflags |= IMUTEX;
408 smbus->smbus_attachflags |= NEXUS_REGISTER;
572 * specific to the smbus.
575 smbus_setup_regs(dev_info_t *dip, smbus_t *smbus)
584 ret = ddi_regs_map_setup(dip, 1, (caddr_t *)&smbus->smbus_regaddr,
585 0, 0, &attr, &smbus->smbus_rhandle);
588 cmn_err(CE_WARN, "%s unable to map regs", smbus->smbus_name);
593 smbus->smbus_name);
602 ret = ddi_regs_map_setup(dip, 0, (caddr_t *)&smbus->smbus_configregaddr,
603 0, 0, &attr, &smbus->smbus_confighandle);
607 smbus->smbus_name);
612 smbus->smbus_name);
623 smbus_free_regs(smbus_t *smbus)
625 if (smbus->smbus_regaddr != NULL) {
626 ddi_regs_map_free(&smbus->smbus_rhandle);
629 if (smbus->smbus_configregaddr != NULL) {
630 ddi_regs_map_free(&smbus->smbus_confighandle);
655 smbus_t *smbus;
659 smbus = ddi_get_soft_state(smbus_state, instance);
661 (void) smbus_acquire(smbus, NULL, NULL);
672 smbus_t *smbus;
676 smbus = ddi_get_soft_state(smbus_state, instance);
678 smbus_release(smbus);
686 smbus_acquire(smbus_t *smbus, dev_info_t *dip, i2c_transfer_t *tp)
688 mutex_enter(&smbus->smbus_mutex);
689 while (smbus->smbus_busy) {
690 cv_wait(&smbus->smbus_cv, &smbus->smbus_mutex);
692 smbus->smbus_busy = 1;
693 mutex_exit(&smbus->smbus_mutex);
696 * On systems where OBP shares a smbus controller with the
698 * smbus controller. Do not grab this lock during CPR
706 plat_shared_i2c_enter(smbus->smbus_dip);
709 smbus->smbus_cur_tran = tp;
710 smbus->smbus_cur_dip = dip;
719 smbus_release(smbus_t *smbus)
721 mutex_enter(&smbus->smbus_mutex);
722 smbus->smbus_busy = 0;
723 cv_signal(&smbus->smbus_cv);
724 smbus->smbus_cur_tran = NULL;
725 smbus->smbus_cur_dip = NULL;
726 mutex_exit(&smbus->smbus_mutex);
728 if ((&plat_shared_i2c_exit != NULL) && (smbus->smbus_cur_dip != NULL)) {
729 plat_shared_i2c_exit(smbus->smbus_dip);
734 smbus_put(smbus_t *smbus, uint8_t reg, uint8_t data, uint8_t flags)
736 ddi_acc_handle_t hp = smbus->smbus_rhandle;
737 uint8_t *reg_addr = smbus->smbus_regaddr;
738 uint8_t *config_addr = smbus->smbus_configregaddr;
739 ddi_acc_handle_t config_handle = smbus->smbus_confighandle;
756 smbus_get(smbus_t *smbus, uint8_t reg)
759 ddi_acc_handle_t hp = smbus->smbus_rhandle;
760 uint8_t *regaddr = smbus->smbus_regaddr;
772 * The southbridge smbus device appears to have a feature where
785 smbus_wait_idle(smbus_t *smbus)
790 smbus_put(smbus, SMB_STS, 0xff, SMBUS_FLUSH);
793 status = smbus_get(smbus, SMB_STS);
804 smbus_t *smbus;
808 smbus = ddi_get_soft_state(smbus_state,
811 if (smbus_acquire(smbus, dip, tp) == SMBUS_FAILURE) {
820 smbus->smbus_retries = 0;
821 smbus->smbus_bytes_to_read = 0;
823 mutex_enter(&smbus->smbus_imutex);
832 status = smbus_wait_idle(smbus);
839 smbus_put(smbus, SMB_TYP, KILL, SMBUS_FLUSH);
840 status = smbus_wait_idle(smbus);
844 smbus_put(smbus, SMB_TYP, T_OUT, SMBUS_FLUSH);
845 status = smbus_wait_idle(smbus);
848 "%s smbus not idle. Unable to reset %x",
849 smbus->smbus_name, status);
850 smbus->smbus_cur_tran->i2c_result = I2C_FAILURE;
851 mutex_exit(&smbus->smbus_imutex);
852 smbus_release(smbus);
857 smbus->smbus_name);
862 if (smbus_switch(smbus) != SMBUS_COMPLETE) {
863 if (smbus->smbus_polling) {
864 smbus->smbus_poll_complete = 0;
865 smbus->smbus_poll_retries = 0;
868 (void) smbus_intr_cmn(smbus, SMBUS_POLL);
869 } while (!smbus->smbus_poll_complete);
873 * smbus where sometimes a transaction never starts,
877 smbus->smbus_timeout = timeout(smbus_intr_timeout,
878 smbus, drv_usectohz(intr_timeout));
881 smbus->smbus_timeout));
886 smbus_interrupts_on(smbus);
889 cv_wait(&smbus->smbus_icv, &smbus->smbus_imutex);
894 mutex_exit(&smbus->smbus_imutex);
895 smbus_release(smbus);
905 smbus_switch(smbus_t *smbus)
908 i2c_transfer_t *tp = smbus->smbus_cur_tran;
913 smbus->smbus_name);
918 smbus->smbus_saved_w_resid = tp->i2c_w_resid;
922 ret = smbus_wr(smbus);
925 ret = smbus_rd(smbus);
931 * work as a single smbus command to
936 ret = smbus_wr(smbus);
938 ret = smbus_rd(smbus);
956 smbus_t *smbus = (smbus_t *)arg;
958 mutex_enter(&smbus->smbus_imutex);
963 if (smbus->smbus_timeout == 0) {
965 mutex_exit(&smbus->smbus_imutex);
970 (void) smbus_intr_cmn(smbus, SMBUS_TIMEOUT);
971 mutex_exit(&smbus->smbus_imutex);
975 * smbus_intr() is the interrupt handler for smbus.
980 smbus_t *smbus = (smbus_t *)arg;
985 * Check to see if intr is really from smbus
987 intr_status = ddi_get32(smbus->smbus_confighandle,
988 (uint32_t *)&smbus->smbus_configregaddr[SMBUS_SRC_STATUS]);
992 SMBUS_PRINT((PRT_INTR, "smbus_intr: intr not from smbus\n"));
997 mutex_enter(&smbus->smbus_imutex);
1003 if (smbus->smbus_timeout == 0) {
1005 mutex_exit(&smbus->smbus_imutex);
1010 result = smbus_intr_cmn(smbus, SMBUS_INTR);
1011 mutex_exit(&smbus->smbus_imutex);
1016 * smbus_intr() is the interrupt handler for smbus.
1019 smbus_intr_cmn(smbus_t *smbus, char *src)
1027 ASSERT(mutex_owned(&smbus->smbus_imutex));
1030 smbus_interrupts_off(smbus);
1032 tp = smbus->smbus_cur_tran;
1048 status = smbus_get(smbus, SMB_STS);
1049 if (smbus->smbus_polling) {
1061 smbus->smbus_poll_retries++ < SMBUS_POLL_MAX_RETRIES) {
1076 smbus->smbus_poll_retries = 0;
1110 smbus_put(smbus, SMB_STS, 0xff, SMBUS_FLUSH);
1112 smbus_put(smbus, SMB_TYP, KILL, SMBUS_FLUSH);
1113 if (smbus->smbus_retries++ < SMBUS_MAX_RETRIES) {
1127 tp->i2c_w_resid = smbus->smbus_saved_w_resid;
1128 smbus->smbus_bytes_to_read = 0;
1135 smbus->smbus_name, error_str);
1139 smbus_put(smbus, SMB_TYP, KILL, SMBUS_FLUSH);
1140 smbus_put(smbus, SMB_STS, 0xff, SMBUS_FLUSH);
1141 smbus->smbus_cur_tran->i2c_result = I2C_FAILURE;
1146 smbus->smbus_retries = 0;
1155 ret = smbus_switch(smbus);
1158 if (smbus->smbus_polling) {
1160 smbus->smbus_poll_complete = 1;
1167 timer_id = smbus->smbus_timeout;
1168 smbus->smbus_timeout = 0;
1169 mutex_exit(&smbus->smbus_imutex);
1171 mutex_enter(&smbus->smbus_imutex);
1173 cv_signal(&smbus->smbus_icv);
1175 smbus_interrupts_on(smbus);
1176 smbus->smbus_timeout = timeout(smbus_intr_timeout,
1177 smbus, drv_usectohz(intr_timeout));
1179 "%s", smbus->smbus_timeout, src));
1187 * smbus_wr handles writes to the smbus. Unlike true I2C busses
1188 * such as provided by pcf8584, smbus attaches a start and stop bit for each
1199 smbus_wr(smbus_t *smbus)
1201 i2c_transfer_t *tp = smbus->smbus_cur_tran;
1202 uint8_t addr = smbus_dip_to_addr(smbus->smbus_cur_dip);
1214 smbus_put(smbus, SMB_STS, 0xff, 0);
1220 smbus_put(smbus, DEV_ADDR, addr, 0);
1226 smbus_put(smbus, SMB_CMD, a, 0);
1227 smbus_put(smbus, SMB_TYP, SEND_BYTE, 0);
1233 smbus_put(smbus, SMB_CMD, a, 0);
1236 smbus_put(smbus, DEV_DATA0, b, 0);
1237 smbus_put(smbus, SMB_TYP, WR_BYTE, 0);
1246 * smbus protocol is not used or interpreted by this driver.
1248 smbus_put(smbus, SMB_TYP, WR_BLK, 0);
1251 smbus_put(smbus, SMB_CMD, a, 0);
1258 smbus_put(smbus, BLK_DATA, a, 0);
1272 smbus_put(smbus, DEV_DATA0, bytes_written, 0);
1279 smbus_put(smbus, STR_PORT, 0, SMBUS_FLUSH);
1285 * smbus_rd handles reads to the smbus. Unlike a true I2C bus
1286 * such as provided by pcf8584, smbus attaches a start and stop bit
1289 * seem to work on smbus, and the southbridge documentation is poor).
1306 smbus_rd(smbus_t *smbus)
1308 i2c_transfer_t *tp = smbus->smbus_cur_tran;
1309 uint8_t addr = smbus_dip_to_addr(smbus->smbus_cur_dip);
1311 if (smbus->smbus_bytes_to_read == 1) {
1313 smbus_get(smbus, DEV_DATA0);
1317 smbus->smbus_bytes_to_read = 0;
1328 smbus_put(smbus, DEV_ADDR, addr | I2C_READ, 0);
1331 smbus->smbus_bytes_to_read = 0;
1336 smbus->smbus_bytes_to_read = 1;
1337 smbus_put(smbus, SMB_TYP, RCV_BYTE, 0);
1339 smbus_put(smbus, SMB_STS, 0xff, 0);
1343 smbus->smbus_bytes_to_read));
1345 smbus_put(smbus, STR_PORT, 0, SMBUS_FLUSH);