Lines Matching refs:via
352 * %g2 = <sfmmup58|pgcnt6>, (pgcnt - 1) is pass'ed in via pgcnt6 bits.
1168 * For Cheetah*, call cpu_tl1_error via systrap at PIL 15
1236 * 10) call cpu_fast_ecc_error via systrap at PIL 14 unless we're already
1248 * call cpu_fast_ecc_error via systrap. The clo_flags parameter is used
1344 * into this macro via %g4. Output only valid if cpu_private
1444 * Call cpu_fast_ecc_error via systrap at PIL 14 unless we're
1486 * being queued. We'll report them via the AFSR/AFAR capture in step 13.
1501 * event pending flag and call cpu_tl1_error via systrap if set.
1598 * 7. call cpu_disrupting_error via sys_trap at PIL 14
1609 * (sys_trap->have_win arg #1) and call cpu_disrupting_error via
1657 * into this macro via %g4. Output only valid if cpu_private
1731 * Call cpu_disrupting_error via systrap at PIL 14 unless we're
1799 * 8. call cpu_deferred_error via sys_trap.
1809 * (sys_trap->have_win arg #1) and call cpu_deferred_error via
1860 * into this macro via %g4. Output only valid if cpu_private
1884 * TT, TL, and CEEN information to the TL=0 handler via
1980 * arguments for cpu_parity_error and calls it via sys_trap.
2054 * We get here via trap 71 at TL>0->Software trap 1 at TL>0. We enter
2161 * arguments for cpu_parity_error and calls it via sys_trap.
2235 * We get here via trap 72 at TL>0->Software trap 2 at TL>0. We enter
2761 * cache_scrubreq_tl1 is the crosstrap handler called on offlined cpus via a
3129 ! loaded via ASI_ITLB_IN. In order to avoid cheetah+ erratum 34,