Lines Matching refs:tmp3
58 #define DCACHE_FLUSHPAGE(arg1, arg2, tmp1, tmp2, tmp3) \
68 ASM_LD(tmp3, dcache_size) ;\
74 * tmp3 = cache size \
77 sub tmp3, tmp1, tmp2 ;\
92 * tmp3 = counter \
95 set MMU_PAGESIZE, tmp3 ;\
97 sub tmp3, tmp1, tmp3 ;\
99 stxa %g0, [arg1 + tmp3]ASI_DC_INVAL ;\
102 cmp %g0, tmp3 ;\
104 sub tmp3, tmp1, tmp3 ;\
111 * tmp3 = cache size \
116 sub tmp3, tmp1, arg2 ;\
140 * tmp1, tmp2, tmp3 = scratch registers
143 #define DCACHE_FLUSHCOLOR(arg, way, tmp1, tmp2, tmp3) \
153 mov way, tmp3; \
154 sllx tmp3, 14, tmp3; /* One way 16K */ \
155 or tmp2, tmp3, tmp3; \
159 * tmp3 = cached page in dcache \
163 stxa %g0, [tmp3 + tmp2]ASI_DC_TAG; \