Lines Matching refs:REALSRC
1311 #define REALSRC %i0
1329 ldub [REALSRC], SRC ! move 4 bytes per loop iteration
1332 ldub [REALSRC + 1], SRC
1333 add REALSRC, 4, REALSRC
1335 ldub [REALSRC - 2], SRC
1338 ldub [REALSRC - 1], SRC
1345 1: ldub [REALSRC], SRC
1346 inc REALSRC
1353 andn REALSRC, 0x7, SRC
1354 alignaddr REALSRC, %g0, %g0
1391 add REALSRC, VIS_BLOCKSIZE, REALSRC
1417 add REALSRC, VIS_BLOCKSIZE, REALSRC
1422 ! only if REALSRC & 0x7 is 0
1425 andcc REALSRC, 0x7, %g0
1454 add REALSRC, VIS_BLOCKSIZE, REALSRC
1467 5: ldub [REALSRC], TMP
1468 inc REALSRC
1597 mov REALSRC, SRC
2273 ldub [REALSRC], SRC ! move 4 bytes per loop iteration
2276 ldub [REALSRC + 1], SRC
2277 add REALSRC, 4, REALSRC
2279 ldub [REALSRC - 2], SRC
2282 ldub [REALSRC - 1], SRC
2289 1: ldub [REALSRC], SRC
2290 inc REALSRC
2297 andn REALSRC, 0x7, SRC
2298 alignaddr REALSRC, %g0, %g0
2335 add REALSRC, VIS_BLOCKSIZE, REALSRC
2361 add REALSRC, VIS_BLOCKSIZE, REALSRC
2366 ! only if REALSRC & 0x7 is 0
2369 andcc REALSRC, 0x7, %g0
2398 add REALSRC, VIS_BLOCKSIZE, REALSRC
2411 5: ldub [REALSRC], TMP
2412 inc REALSRC
3061 lduba [REALSRC]%asi, SRC ! move 4 bytes per loop iteration
3064 lduba [REALSRC + 1]%asi, SRC
3065 add REALSRC, 4, REALSRC
3067 lduba [REALSRC - 2]%asi, SRC
3070 lduba [REALSRC - 1]%asi, SRC
3077 1: lduba [REALSRC]%asi, SRC
3078 inc REALSRC
3085 andn REALSRC, 0x7, SRC
3086 alignaddr REALSRC, %g0, %g0
3123 add REALSRC, VIS_BLOCKSIZE, REALSRC
3149 add REALSRC, VIS_BLOCKSIZE, REALSRC
3154 ! only if REALSRC & 0x7 is 0
3157 andcc REALSRC, 0x7, %g0
3186 add REALSRC, VIS_BLOCKSIZE, REALSRC
3199 5: lduba [REALSRC]ASI_USER, TMP
3200 inc REALSRC