Lines Matching defs:prg
428 pxtool_validate_barnum_bdf(pcitool_reg_t *prg)
432 if (prg->barnum >= (sizeof (pci_bars) / sizeof (pci_bars[0]))) {
433 prg->status = PCITOOL_OUT_OF_RANGE;
437 } else if (((prg->bus_no &
438 (PCI_REG_BUS_M >> PCI_REG_BUS_SHIFT)) != prg->bus_no) ||
439 ((prg->dev_no &
440 (PCI_REG_DEV_M >> PCI_REG_DEV_SHIFT)) != prg->dev_no) ||
441 ((prg->func_no &
442 (PCI_REG_FUNC_M >> PCI_REG_FUNC_SHIFT)) != prg->func_no)) {
443 prg->status = PCITOOL_INVALID_ADDRESS;
631 pcitool_reg_t prg;
643 if (ddi_copyin(arg, &prg, sizeof (pcitool_reg_t),
649 if ((rval = pxtool_dev_reg_ops_platchk(dip, &prg)) != SUCCESS) {
654 prg.bus_no, prg.dev_no, prg.func_no);
656 prg.barnum, prg.offset, prg.acc_attr);
658 if ((rval = pxtool_validate_barnum_bdf(&prg)) != SUCCESS)
661 if (prg.barnum == 0) { /* Proper config space desired. */
664 if (prg.offset >= DEV_CFG_SPACE_SIZE) {
667 prg.offset);
668 prg.status = PCITOOL_OUT_OF_RANGE;
692 off_in_space = PX_GET_BDF(&prg);
693 prg.phys_addr =
695 prg.phys_addr += prg.offset;
699 "end:%s\n", off_in_space, prg.phys_addr,
700 PCITOOL_ACC_IS_BIG_ENDIAN(prg.acc_attr) ? "big":"ltl");
706 rval = pxtool_pcicfg_access(px_p, &prg, &prg.data, write_flag);
712 if ((rval = pxtool_get_bar(px_p, &prg, &bar, &space)) != SUCCESS)
721 if ((PCI_BAR_OFFSET(prg) == PCI_CONF_ROM) && (write_flag)) {
722 prg.status = PCITOOL_ROM_WRITE;
739 prg.status = PCITOOL_IO_ERROR;
748 * Note that prg.status is modified on error.
750 off_in_space = bar + prg.offset;
751 prg.phys_addr = pxtool_get_phys_addr(px_p, space, off_in_space);
755 "phys_addr:0x%" PRIx64 "\n", bar, prg.offset, prg.phys_addr);
757 rval = pxtool_pciiomem_access(px_p, &prg, &prg.data, write_flag);
760 prg.drvr_version = PCITOOL_VERSION;
761 if (ddi_copyout(&prg, arg, sizeof (pcitool_reg_t),