Lines Matching refs:px_p
54 static int px_enable_err_intr(px_t *px_p);
55 static void px_disable_err_intr(px_t *px_p);
61 static void px_set_mps(px_t *px_p);
195 px_t *px_p = INST_TO_STATE(instance);
203 if (px_p == NULL) {
208 *result = (void *)px_p->px_dip;
226 px_t *px_p; /* per bus state pointer */
249 px_p = INST_TO_STATE(instance);
250 px_p->px_dip = dip;
251 mutex_init(&px_p->px_mutex, NULL, MUTEX_DRIVER, NULL);
252 px_p->px_soft_state = PCI_SOFT_STATE_CLOSED;
258 px_dbg_attach(dip, &px_p->px_dbg_hdl);
265 if (px_get_props(px_p, dip) == DDI_FAILURE)
272 px_p->px_dev_hdl = dev_hdl;
275 px_p->px_bdf = px_lib_get_bdf(px_p);
281 if ((ret = px_ib_attach(px_p)) != DDI_SUCCESS)
284 if (px_cb_attach(px_p) != DDI_SUCCESS)
293 if ((px_mmu_attach(px_p)) != DDI_SUCCESS)
296 if ((px_msiq_attach(px_p)) != DDI_SUCCESS)
299 if ((px_msi_attach(px_p)) != DDI_SUCCESS)
302 if ((px_pec_attach(px_p)) != DDI_SUCCESS)
305 if ((px_dma_attach(px_p)) != DDI_SUCCESS)
308 if ((px_fm_attach(px_p)) != DDI_SUCCESS)
315 if ((px_enable_err_intr(px_p)) != DDI_SUCCESS)
324 (void) px_set_mps(px_p);
349 px_cpr_add_callb(px_p);
359 px_p->px_state = PX_ATTACHED;
387 px_disable_err_intr(px_p);
389 px_fm_detach(px_p);
391 px_pec_detach(px_p);
393 px_msi_detach(px_p);
395 px_msiq_detach(px_p);
397 px_mmu_detach(px_p);
400 px_ib_detach(px_p);
406 px_free_props(px_p);
409 px_dbg_detach(dip, &px_p->px_dbg_hdl);
410 mutex_destroy(&px_p->px_mutex);
419 px_p = INST_TO_STATE(instance);
421 mutex_enter(&px_p->px_mutex);
424 if (px_p->px_state != PX_SUSPENDED) {
425 DBG(DBG_ATTACH, px_p->px_dip,
431 px_msiq_resume(px_p);
434 px_p->px_state = PX_ATTACHED;
436 mutex_exit(&px_p->px_mutex);
456 px_t *px_p = INST_TO_STATE(instance);
463 if (px_p->px_state != PX_ATTACHED) {
468 mutex_enter(&px_p->px_mutex);
477 px_cpr_rem_callb(px_p);
485 mutex_exit(&px_p->px_mutex);
497 px_p->px_state = PX_DETACHED;
501 px_disable_err_intr(px_p);
502 px_fm_detach(px_p);
503 px_pec_detach(px_p);
506 px_msi_detach(px_p);
507 px_msiq_detach(px_p);
508 px_mmu_detach(px_p);
509 px_ib_detach(px_p);
518 px_free_props(px_p);
520 px_dbg_detach(dip, &px_p->px_dbg_hdl);
521 mutex_exit(&px_p->px_mutex);
522 mutex_destroy(&px_p->px_mutex);
524 px_p->px_dev_hdl = NULL;
531 mutex_exit(&px_p->px_mutex);
535 px_p->px_state = PX_SUSPENDED;
536 mutex_exit(&px_p->px_mutex);
542 mutex_exit(&px_p->px_mutex);
548 px_enable_err_intr(px_t *px_p)
551 px_fm_cb_enable(px_p);
554 if (px_cb_add_intr(&px_p->px_cb_fault) != DDI_SUCCESS)
558 if (px_err_add_intr(&px_p->px_fault) != DDI_SUCCESS)
562 if (px_pec_msg_add_intr(px_p) != DDI_SUCCESS)
568 px_err_rem_intr(&px_p->px_fault);
570 px_cb_rem_intr(&px_p->px_cb_fault);
572 px_fm_cb_disable(px_p);
578 px_disable_err_intr(px_t *px_p)
580 px_pec_msg_rem_intr(px_p);
581 px_err_rem_intr(&px_p->px_fault);
582 px_cb_rem_intr(&px_p->px_cb_fault);
583 px_fm_cb_disable(px_p);
587 px_cb_attach(px_t *px_p)
589 px_fault_t *fault_p = &px_p->px_cb_fault;
590 dev_info_t *dip = px_p->px_dip;
594 px_p->px_inos[PX_INTR_XBC], &sysino) != DDI_SUCCESS)
600 fault_p->px_intr_ino = px_p->px_inos[PX_INTR_XBC];
614 px_t *px_p = INST_TO_STATE(instance);
636 mutex_init(&px_p->px_l23ready_lock, NULL, MUTEX_DRIVER,
638 cv_init(&px_p->px_l23ready_cv, NULL, CV_DRIVER, NULL);
642 hdl.ih_cb_arg1 = px_p;
652 &px_p->px_pm_msiq_id) != DDI_SUCCESS) {
657 px_lib_msg_setmsiq(dip, PCIE_PME_ACK_MSG, px_p->px_pm_msiq_id);
660 if (px_ib_update_intr_state(px_p, px_p->px_dip, hdl.ih_inum,
661 px_msiqid_to_devino(px_p, px_p->px_pm_msiq_id), px_pwr_pil,
673 px_p->px_pm_msiq_id);
675 mutex_destroy(&px_p->px_l23ready_lock);
676 cv_destroy(&px_p->px_l23ready_cv);
688 px_t *px_p = INST_TO_STATE(instance);
703 px_p->px_pm_msiq_id);
705 (void) px_ib_update_intr_state(px_p, px_p->px_dip, hdl.ih_inum,
706 px_msiqid_to_devino(px_p, px_p->px_pm_msiq_id), px_pwr_pil,
709 px_p->px_pm_msiq_id = (msiqid_t)-1;
711 cv_destroy(&px_p->px_l23ready_cv);
712 mutex_destroy(&px_p->px_l23ready_lock);
730 px_t *px_p = DIP_TO_STATE(dip);
796 if (rval = px_reloc_reg(dip, rdip, px_p, rp))
804 if (rval = px_xlate_reg(px_p, rp, &p_regspec))
842 px_t *px_p = DIP_TO_STATE(dip);
843 px_mmu_t *mmu_p = px_p->px_mmu_p;
855 if (ret = px_dma_type(px_p, dmareq, mp))
857 if (ret = px_dma_pfn(px_p, dmareq, mp))
862 if ((ret = px_dvma_win(px_p, dmareq, mp)) || !handlep)
877 if ((ret = px_dma_physwin(px_p, dmareq, mp)) || !handlep)
908 px_t *px_p = DIP_TO_STATE(dip);
929 if (rval = px_dma_attr2hdl(px_p, mp)) {
966 px_t *px_p = DIP_TO_STATE(dip);
967 px_mmu_t *mmu_p = px_p->px_mmu_p;
980 if (ret = px_dma_type(px_p, dmareq, mp))
982 if (ret = px_dma_pfn(px_p, dmareq, mp))
987 if (ret = px_dvma_win(px_p, dmareq, mp))
1005 if (ret = px_dma_physwin(px_p, dmareq, mp))
1041 px_t *px_p = DIP_TO_STATE(dip);
1042 px_mmu_t *mmu_p = px_p->px_mmu_p;
1108 px_t *px_p = DIP_TO_STATE(dip);
1109 px_mmu_t *mmu_p = px_p->px_mmu_p;
1206 px_t *px_p = DIP_TO_STATE(dip);
1207 return (px_fdvma_reserve(dip, rdip, px_p,
1211 px_t *px_p = DIP_TO_STATE(dip);
1212 return (px_fdvma_release(dip, px_p, mp));
1255 px_t *px_p = DIP_TO_STATE(dip);
1261 return (px_init_child(px_p, (dev_info_t *)arg));
1264 return (px_uninit_child(px_p, (dev_info_t *)arg));
1304 pf_init(rdip, (void *)px_p->px_fm_ibc, as->cmd);
1386 px_t *px_p = DIP_TO_STATE(dip);
1407 (px_p->px_supp_intr_types | DDI_INTR_TYPE_FIXED) :
1408 px_p->px_supp_intr_types);
1433 px_set_mps(px_t *px_p)
1439 dip = px_p->px_dip;
1445 if (px_lib_get_root_complex_mps(px_p, dip,
1463 (void) px_lib_set_root_complex_mps(px_p, dip, bus_p->bus_mps);