Cross Reference: /illumos-gate/usr/src/uts/sun4/io/pcicfg.c

Lines Matching defs:req
916 	ndi_ra_request_t	req;
947 	bzero((caddr_t)&req, sizeof (ndi_ra_request_t));
948 	req.ra_len = 1;
949 	if (ndi_ra_alloc(ddi_get_parent(new_device), &req,
2513 			DEBUG3("hole found. start %llx, len %llx, req=%x\n",
4297 	ndi_ra_request_t	req;
4897 	ndi_ra_request_t req;
4932 	bzero((caddr_t)&req, sizeof (ndi_ra_request_t));
4933 	req.ra_flags = (NDI_RA_ALLOC_BOUNDED | NDI_RA_ALLOC_PARTIAL_OK);
4934 	req.ra_boundbase = 0;
4935 	req.ra_boundlen = PCICFG_MAX_BUS_DEPTH;
4936 	req.ra_len = PCICFG_MAX_BUS_DEPTH;
4937 	req.ra_align_mask = 0;  /* no alignment needed */
4939 	rval = ndi_ra_alloc(ddi_get_parent(new_child), &req,
4983 	bzero((caddr_t)&req, sizeof (ndi_ra_request_t));
4984 	req.ra_flags = (NDI_RA_ALLOC_BOUNDED | NDI_RA_ALLOC_PARTIAL_OK);
4985 	req.ra_boundbase = 0;
4990 	req.ra_boundlen = PCICFG_4GIG_LIMIT + 1;
4991 	req.ra_len = PCICFG_4GIG_LIMIT + 1; /* Get as big as possible */
4992 	req.ra_align_mask =
4995 	rval = ndi_ra_alloc(ddi_get_parent(new_child), &req,
5030 	bzero((caddr_t)&req, sizeof (ndi_ra_request_t));
5031 	req.ra_align_mask = PCICFG_IOGRAN - 1; /* 4k alignment */
5032 	req.ra_boundbase = 0;
5033 	req.ra_boundlen = PCICFG_4GIG_LIMIT;
5034 	req.ra_flags = (NDI_RA_ALLOC_BOUNDED | NDI_RA_ALLOC_PARTIAL_OK);
5035 	req.ra_len = PCICFG_4GIG_LIMIT; /* Get as big as possible */
5037 	rval = ndi_ra_alloc(ddi_get_parent(new_child), &req, &io_answer,
5118 		bzero((caddr_t)&req, sizeof (ndi_ra_request_t));
5119 		req.ra_flags = NDI_RA_ALLOC_SPECIFIED;
5120 		req.ra_addr = PCICFG_ROUND_DOWN((mem_answer + mem_alen),
5122 		req.ra_len =  (mem_answer + mem_alen) -
5126 		(void) ndi_ra_alloc(new_child, &req,
5160 		bzero((caddr_t)&req, sizeof (ndi_ra_request_t));
5161 		req.ra_flags = NDI_RA_ALLOC_SPECIFIED;
5162 		req.ra_addr = PCICFG_ROUND_DOWN((io_answer + io_alen),
5164 		req.ra_len =  (io_answer + io_alen) -
5168 		(void) ndi_ra_alloc(new_child, &req,
6012 	ndi_ra_request_t req;
6096 	bzero((caddr_t)&req, sizeof (ndi_ra_request_t));
6098 	req.ra_boundbase = 0;
6099 	req.ra_boundlen = PCICFG_4GIG_LIMIT;
6100 	req.ra_len = size;
6101 	req.ra_flags = (NDI_RA_ALIGN_SIZE | NDI_RA_ALLOC_BOUNDED);
6104 	    &req, &mem_answer, &mem_alen,