Lines Matching refs:pci_phys_hi

563 	p.pci_phys_hi = fc_cell2uint(fc_arg(cp, 1));
850 p.pci_phys_hi = fc_cell2uint(fc_arg(cp, 0));
858 if ((p.pci_phys_hi & PCI_ADDR_MASK) != PCI_ADDR_CONFIG) {
860 "invalid config addr: %x\n", p.pci_phys_hi);
869 reg = (p.pci_phys_hi & PCI_REG_REG_M) |
870 (((p.pci_phys_hi & PCI_REG_EXTREG_M) >> PCI_REG_EXTREG_SHIFT) << 8);
872 p.pci_phys_hi &= PCI_BDF_bits;
982 p.pci_phys_hi = fc_cell2uint(fc_arg(cp, 0));
990 if ((p.pci_phys_hi & PCI_ADDR_MASK) != PCI_ADDR_CONFIG) {
992 "invalid config addr: %x\n", p.pci_phys_hi);
1000 reg = (p.pci_phys_hi & PCI_REG_REG_M) |
1001 (((p.pci_phys_hi & PCI_REG_EXTREG_M) >> PCI_REG_EXTREG_SHIFT) << 8);
1003 p.pci_phys_hi &= PCI_BDF_bits;
1294 if (assigned[i].pci_phys_hi == phys_spec.pci_phys_hi) {
1314 if (PCI_REG_BDFR_G(assigned[i].pci_phys_hi) ==
1315 PCI_REG_BDFR_G(phys_spec.pci_phys_hi)) {
1319 if (PCI_REG_ADDR_G(assigned[i].pci_phys_hi) !=
1320 PCI_REG_ADDR_G(phys_spec.pci_phys_hi)) {
1324 assigned[i].pci_phys_hi,
1325 phys_spec.pci_phys_hi);
1348 config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi;
1349 config.pci_phys_hi &= ~PCI_REG_REG_M;
1386 offset = PCI_REG_REG_G(phys_spec.pci_phys_hi);
1390 if (PCI_REG_REG_G(phys_spec.pci_phys_hi) == PCI_CONF_ROM) {
1414 switch (PCI_REG_ADDR_G(phys_spec.pci_phys_hi)) {
1418 if (phys_spec.pci_phys_hi & PCI_REG_REL_M) {
1461 phys_spec.pci_phys_hi ^= PCI_ADDR_MEM64 ^
1469 if (phys_spec.pci_phys_hi & PCI_REG_REL_M) {
1508 if (phys_spec.pci_phys_hi & PCI_REG_REL_M) {
1575 config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi;
1576 config.pci_phys_hi &= ~PCI_REG_REG_M;
1608 offset = PCI_REG_REG_G(phys_spec.pci_phys_hi);
1618 if (PCI_REG_REG_G(phys_spec.pci_phys_hi) == PCI_CONF_ROM) {
1631 switch (PCI_REG_ADDR_G(phys_spec.pci_phys_hi)) {
1678 phys_spec.pci_phys_hi);
1825 if (assigned[i].pci_phys_hi == oldone->pci_phys_hi) {
1835 oldone->pci_phys_hi);
1843 oldone->pci_phys_hi);