Lines Matching defs:dmar

525 	volatile struct dma	*dmar = NULL;
635 if (ddi_regs_map_setup(dip, (uint_t)0, (caddr_t *)&dmar,
672 fas->f_dma = dmar;
831 if (DMAREV(dmar) != 0) {
1582 volatile struct dma *dmar = fas->f_dma; \
1583 ASSERT((fas_dma_reg_read(fas, &dmar->dma_csr) & DMA_ENDVMA) == 0); \
1586 fas_dma_reg_write(fas, &dmar->dma_count, count); \
1589 fas_dma_reg_write(fas, &dmar->dma_addr, (fas->f_lastdma = base)); \
1590 fas_dma_reg_write(fas, &dmar->dma_csr, fas->f_dma_csr); \
1595 volatile struct dma *dmar = fas->f_dma; \
1596 ASSERT((fas_dma_reg_read(fas, &dmar->dma_csr) & DMA_ENDVMA) == 0); \
1598 fas_dma_reg_write(fas, &dmar->dma_count, count); \
1601 fas_dma_reg_write(fas, &dmar->dma_addr, (fas->f_lastdma = base)); \
1607 volatile struct dma *dmar = fas->f_dma; \
1608 ASSERT((fas_dma_reg_read(fas, &dmar->dma_csr) & DMA_ENDVMA) == 0); \
1613 fas_dma_reg_write(fas, &dmar->dma_count, dmacount); \
1614 fas_dma_reg_write(fas, &dmar->dma_addr, (fas->f_lastdma = base)); \
1615 fas_dma_reg_write(fas, &dmar->dma_csr, fas->f_dma_csr); \
1804 volatile struct dma *dmar = fas->f_dma;
1867 dmarev = fas_dma_reg_read(fas, &dmar->dma_csr);
3869 volatile struct dma *dmar = fas->f_dma;
3884 if ((fas->f_dma_csr = fas_dma_reg_read(fas, &dmar->dma_csr))
4833 volatile struct dma *dmar = fas->f_dma;
4850 if ((fas->f_dma_csr = fas_dma_reg_read(fas, &dmar->dma_csr)) &
5796 volatile struct dma *dmar = fas->f_dma;
5819 fas->f_dma_csr = fas_dma_reg_read(fas, &dmar->dma_csr);
9316 volatile struct dma *dmar = fas->f_dma;
9317 uint_t csr = fas_dma_reg_read(fas, &dmar->dma_csr);
9318 uint_t count = fas_dma_reg_read(fas, &dmar->dma_count);
9319 uint_t addr = fas_dma_reg_read(fas, &dmar->dma_addr);
9320 uint_t test = fas_dma_reg_read(fas, &dmar->dma_test);